On 27/01/2021 14.18, Alexandre Belloni wrote:

On 27/01/2021 14:07:59+0100, Rasmus Villemoes wrote:

quoted

On 26/01/2021 23.48, Alexandre Belloni wrote:

quoted

On 21/12/2020 22:17:54+0100, Rasmus Villemoes wrote:

quoted

On 19/12/2020 02.34, Alexandre Belloni wrote:

quoted

pcf2127, pcf2129 and pca2129 support start-year and reset-source.

No, the 2129 variant doesn't even have a reset output pin. Not sure if
there's any way to reflect that, and it probably doesn't matter, since
nobody's going to add the reset-source property to a 2129 node. But the
commit message is a bit misleading.

Actually no, the INT pin can be used as a reset, the pcf/pca2129
can be used as a watchdog and so it may need the reset-source property.

Unless I'm missing something, that would require some rather creative
extra circuitry: The interrupt pin is kept low until the appropriate bit
in the rtc is cleared, so if that is routed directly to a reset pin on
the SOC, the SOC would be kept in reset indefinitely.

You mean inverting the level of INT? I don't think this is creative or
complicated...

No, that is not what I meant nor what I wrote.

And anyway, INT# is active low, like RST# so if the SoC has an RST#
input, this should just work.

AFAIK (and that may certainly be wrong), most SOCs require a _pulse_ on
their reset input; asserting and keeping the reset pin low would just
keep the cpu in reset, never allowing it to leave that state and then
talk to the RTC to clear the bit that would clear the interrupt.

That's also how the 2127 RST# behaves: it generates a pulse (of width
244us or 15ms). The INT# and RST# pins cannot be used interchangeably.

Rasmus