@@ -21,6 +21,7 @@
 #include <linux/slab.h>
 #include <linux/platform_data/atmel.h>
 #include <linux/io.h>
+#include <linux/clk.h>
 
 /*
  * This driver uses two configurable hardware resources that live in the

@@ -74,6 +75,7 @@ struct sam9_rtc {
 	u32			imr;
 	void __iomem		*gpbr;
 	int 			irq;
+	struct clk		*sclk;
 };
 
 #define rtt_readl(rtc, field) \

@@ -373,6 +375,25 @@ static int at91_rtc_probe(struct platform_device *pdev)
 		return ret;
 	}
 
+	/* Retain slow clk if it is specified in the DT.
+	 * Do not complain if slow clk is missing, but check its rate
+	 * if it is available.
+	 */
+	rtc->sclk = devm_clk_get(&pdev->dev, NULL);
+	if (!IS_ERR(rtc->sclk)) {
+		if (clk_get_rate(rtc->sclk) != AT91_SLOW_CLOCK) {
+			dev_err(&pdev->dev,
+				"Invalid slow clock rate (expecting %lu got %lu)",
+				(unsigned long)AT91_SLOW_CLOCK,
+				clk_get_rate(rtc->sclk));
+			return -EINVAL;
+		}
+
+		ret = clk_prepare_enable(rtc->sclk);
+		if (ret)
+			return ret;
+	}
+
 	/* NOTE:  sam9260 rev A silicon has a ROM bug which resets the
 	 * RTT on at least some reboots.  If you have that chip, you must
 	 * initialize the time from some external source like a GPS, wall

@@ -397,6 +418,9 @@ static int at91_rtc_remove(struct platform_device *pdev)
 	/* disable all interrupts */
 	rtt_writel(rtc, MR, mr & ~(AT91_RTT_ALMIEN | AT91_RTT_RTTINCIEN));
 
+	if (!IS_ERR(rtc->sclk))
+		clk_disable_unprepare(rtc->sclk);
+
 	return 0;
 }