On Fri, 8 Feb 2008, Sébastien Dugué wrote:

On Thu, 07 Feb 2008 17:27:53 +0100 Matthieu CASTET [off-list ref] wrote:

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Hi Sébastien,

Sébastien Dugué wrote:

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  Hello Matthieu,

On Thu, 07 Feb 2008 14:49:07 +0100 Matthieu CASTET [off-list ref] wrote:

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hi,

I am trying to use some IBM rt test on arm.


I define atomic_add to
assert(i==1);
return ++(v->counter);

That's a bit ugly, but that should work for my need.

  That would be the poor man's atomic_inc() and not sure it really does
what you think it does ;). Just for the record, pre-armv6 cores have no support
for userland atomic operations (aside from swapping).

I can, if I use a kernel helper :) [1]

 Yep, but much slower.

I worked with an ARMv4 at my former job and wanted to run Linux on 
it. I thus gave this problem a thought. I got the following idea:
Make a user space preemt-disable counter just like the in-kernel one. This 
can be done by registering a address in userspace per thread pointing 
where to find the counter. When the kernel wants to schedule it checks if 
the counter is non-zero. If it is (the very rare case), it doesn't 
reschedule but sets up a timer of some configurable time (say 1 ms or
whatever you need). If the counter is not back to 0 after the timer has 
expired we schedule anyway and signals the thread to let it know that an
atomic operation have failed. Notice, that this can only happen due to an
error in the program: You must always be able finish your atomic 
operations in 1 ms.

(There are a lot of details to this, ofcourse.  Forinstance. in the case 
the kernel wanted to schedule and sets up he timer, the user space program 
needs to know it so it can disable the timer reschedule as soon as the 
counter reaches 0. And there is the problem of not swapping out the page 
where the counter is stored....)

Esben

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BTW what should do the atomic_add.
On i386 it does the atomic add and return the value in memory before the
add (Exchange and Add).

 Looking at the kernel and glibc, i386's atomic_add seems to be a void
function (unless I missed something).

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On powerpc, it seems to do the atomic add and return the new value.

 Yes, both for kernel and glibc implementations.

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But I have a problem with the sched_latency test.
On my platform the thread creation is quite slow (25ms), so with the
default value, I got a PERIOD MISSED.

  The IBM RT tests have been integrated into the LTP and I recently
sent some updates to those testcases. Notably one the patches did improve
the thread starting time. Other patches did touch this particular test too.

  Could you try the latest release (from LTP) and tell me if things
have improved for you.

Ok I will try them.

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  Also, the PASS/FAIL criteria are quite arbitrary. They happen to be fine
for most recent PC-class hardware but surely not for embedded systems and
should be tuned according to your RT requirements.

Yes I saw that.

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Also my cpu is quite slow (compared to last intel core or powerpc). For
example a sched_jitter run take 6s.

  Ouch! What's your CPU (core type, clock speed)?

Arm926 ~104.65 Mhz

 ARMv5 core then. You'll need the kernel helper then to be trully atomic.

 Sebastien.
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