Thread (8 messages) 8 messages, 5 authors, 2021-08-10

[PATCH] riscv: add ARCH_DMA_MINALIGN support

From: Xianting Tian <hidden>
Date: 2021-08-07 14:55:45
Also in: lkml
Subsystem: risc-v architecture, the rest · Maintainers: Paul Walmsley, Palmer Dabbelt, Albert Ou, Linus Torvalds

Introduce ARCH_DMA_MINALIGN to riscv arch.

Signed-off-by: Xianting Tian <redacted>
---
 arch/riscv/include/asm/cache.h | 2 ++
 1 file changed, 2 insertions(+)
diff --git a/arch/riscv/include/asm/cache.h b/arch/riscv/include/asm/cache.h
index 9b58b1045..2945bbe2b 100644
--- a/arch/riscv/include/asm/cache.h
+++ b/arch/riscv/include/asm/cache.h
@@ -11,6 +11,8 @@
 
 #define L1_CACHE_BYTES		(1 << L1_CACHE_SHIFT)
 
+#define ARCH_DMA_MINALIGN	L1_CACHE_BYTES
+
 /*
  * RISC-V requires the stack pointer to be 16-byte aligned, so ensure that
  * the flat loader aligns it accordingly.
-- 
2.17.1


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