Thread (126 messages) 126 messages, 14 authors, 2018-04-02

Re: RFC on writel and writel_relaxed

From: <hidden>
Date: 2018-03-26 12:11:49
Also in: linuxppc-dev

On 2018-03-26 07:44, Will Deacon wrote:
Hi Ben,

I don't seem to have the beginning of this thread, so please bounce it 
over
if you'd like me to look at it!
https://www.spinics.net/lists/linux-rdma/msg62570.html

https://www.spinics.net/lists/linux-rdma/index.html#62666

On Fri, Mar 23, 2018 at 11:16:08AM +1100, Benjamin Herrenschmidt wrote:
quoted
On Thu, 2018-03-22 at 12:51 -0500, Sinan Kaya wrote:
quoted
On 3/22/2018 8:52 AM, Benjamin Herrenschmidt wrote:
quoted
quoted
quoted
No, it's not sufficient.
Just to clarify ... barrier() is just a compiler barrier, it means the
compiler will generate things in the order they are written. This isn't
sufficient on archs with an OO memory model, where an actual memory
barrier instruction needs to be emited.
Surprisingly, ARM64 GCC compiler generates a write barrier as
opposed to preventing code reordering.
In context, this looks like a misunderstanding somewhere. barrier() is 
a
compiler barrier for us just like everybody else and we use the generic
implementation with the empty asm + memory clobber.
True, I clarified it this weekend

https://www.spinics.net/lists/linux-rdma/msg62788.html
Keyboard shortcuts
hback out one level
jnext message in thread
kprevious message in thread
ldrill in
Escclose help / fold thread tree
?toggle this help