On 2021-07-31 03:50, Doug Anderson wrote:

Hi,

On Wed, May 12, 2021 at 1:11 AM Sibi Sankar [off-list ref] 
wrote:

quoted

Add OPP tables required to scale DDR/L3 per freq-domain on SC7280 
SoCs.

Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Sibi Sankar <redacted>
---

V3:
 * Rename cpu opp table nodes [Matthias]
 * Rename opp phandles [Doug]

Depends on the following patch series:
L3 Provider Support: 
https://lore.kernel.org/lkml/1618556290-28303-1-git-send-email-okukatla@codeaurora.org/ (local)
CPUfreq Support: 
https://lore.kernel.org/lkml/1618020280-5470-2-git-send-email-tdas@codeaurora.org/ (local)
RPMH Provider Support: 
https://lore.kernel.org/lkml/1619517059-12109-1-git-send-email-okukatla@codeaurora.org/ (local)

Doug,

2 of the above 3 dependencies have
landed. L3 provider still needs a
re-spin.

https://patchwork.kernel.org/project/linux-arm-msm/cover/1627581885-32165-1-git-send-email-sibis@codeaurora.org/

We also have a new series ^^ on the
list which will affect #2 merge.

quoted

It also depends on L3 and cpufreq dt nodes from the ^^ series to not 
have
overlapping memory regions.

 arch/arm64/boot/dts/qcom/sc7280.dtsi | 215 
+++++++++++++++++++++++++++++++++++
 1 file changed, 215 insertions(+)

I see patch #1 in mainline now. Does that mean it's time to land patch
#2 in the Qualcomm tree now? ...or maybe it needs to be re-posted?

-Doug

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