On Thu, Mar 15, 2018 at 04:12:44PM +0530, Subhransu S. Prusty wrote:
On Wed, Mar 14, 2018 at 09:07:14PM +0530, Anshuman Gupta wrote:
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On Wed, Mar 14, 2018 at 11:53:58AM +0100, Rafael J. Wysocki wrote:
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On Wed, Mar 14, 2018 at 11:38 AM, Anshuman Gupta
[off-list ref] wrote:
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On Mon, Mar 12, 2018 at 12:26:53PM +0100, Rafael J. Wysocki wrote:
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On Mon, Mar 12, 2018 at 12:17 PM, Anshuman Gupta
[off-list ref] wrote:
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+ if (pm_runtime_status_suspended(dev))
+ return;
That, again, is somewhat fragile from the concurrency perspective.
And here you want to avoid the below if the device is still suspended.
Yes, if we do not avoid the code below, complete callback takes about
3 seconds due to snd_hdac_codec_read timed out because hdac controller
would be in runtime suspend state.
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Why is the below code located in the ->complete callback anyway?
Shouldn't it be there in the ->resume one?
Yes even i am also having same doubt, why these power down and power up
sequences are part of prepare and complete callback.
Adding driver author "Subhransu S. Prusty" to provide more inputs on this.
This driver needs a late resume as it receives a jack notification from the
i915 driver and the skl controller driver resume may not have happened and
in turn hda controller may not ready. This ensures a synchronization for
jack event during resume from S3.
Let me give you insight of the issue, this driver blocks the direct complete
of hda controller PCI 00:1f.3, sometimes it takes 280ms to resume hda controller
from S3 and s2idle. So it does not make sense to suspend/resume hda controller
when it is already in runtime suspend.
I think this patch defeats the purpose.
Here in this case PCI driver may kick the direct complete for hda controller
https://elixir.bootlin.com/linux/latest/source/drivers/pci/pci-driver.c#L691
But hdac hdmi codec driver is blocking it.
So i think it will be ok to keep this codec and hda controller in runtime
suspend while entering S3 or s2idle, both can resume by runtime PM as well,
will it brake any audio functionality?
Regards,
Subhransu
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/* Power up afg */
snd_hdac_codec_read(hdac, hdac->afg, 0, AC_VERB_SET_POWER_STATE,
AC_PWRST_D0);
--
2.7.4
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Thanks,
Anshuman
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Thanks,
Anshuman