[PATCH v2 08/27] x86/CPU: Adapt assembly for PIE support
From: Thomas Garnier <hidden>
Date: 2018-03-13 20:59:26
Also in:
kvm, linux-arch, linux-crypto, lkml, xen-devel
Subsystem:
the rest, x86 architecture (32-bit and 64-bit) · Maintainers:
Linus Torvalds, Thomas Gleixner, Ingo Molnar, Borislav Petkov, Dave Hansen
Change the assembly code to use only relative references of symbols for the kernel to be PIE compatible. Use the new _ASM_MOVABS macro instead of the 'mov $symbol, %dst' construct. Position Independent Executable (PIE) support will allow to extended the KASLR randomization range below the -2G memory limit. Signed-off-by: Thomas Garnier <redacted> --- arch/x86/include/asm/processor.h | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/processor.h
index b0ccd4847a58..1b9488b1018a 100644
--- a/arch/x86/include/asm/processor.h
+++ b/arch/x86/include/asm/processor.h@@ -50,7 +50,7 @@ static inline void *current_text_addr(void) { void *pc; - asm volatile("mov $1f, %0; 1:":"=r" (pc)); + asm volatile(_ASM_MOVABS " $1f, %0; 1:":"=r" (pc)); return pc; }
@@ -710,6 +710,7 @@ static inline void sync_core(void) : ASM_CALL_CONSTRAINT : : "memory"); #else unsigned int tmp; + unsigned long tmp2; asm volatile ( UNWIND_HINT_SAVE
@@ -720,11 +721,13 @@ static inline void sync_core(void) "pushfq\n\t" "mov %%cs, %0\n\t" "pushq %q0\n\t" - "pushq $1f\n\t" + "leaq 1f(%%rip), %1\n\t" + "pushq %1\n\t" "iretq\n\t" UNWIND_HINT_RESTORE "1:" - : "=&r" (tmp), ASM_CALL_CONSTRAINT : : "cc", "memory"); + : "=&r" (tmp), "=&r" (tmp2), ASM_CALL_CONSTRAINT + : : "cc", "memory"); #endif }
--
2.16.2.660.g709887971b-goog
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