Thread (21 messages) 21 messages, 5 authors, 2018-04-23

Re: [PATCH/RFC 1/5] dt-bindings: mfd: bd9571mwv: Document rohm,ddr-backup-power

From: Lee Jones <hidden>
Date: 2017-10-13 10:00:23
Also in: linux-arm-kernel, linux-devicetree, linux-renesas-soc, lkml

On Fri, 13 Oct 2017, Geert Uytterhoeven wrote:
Hi Lee,

On Fri, Oct 13, 2017 at 10:55 AM, Lee Jones [off-list ref] wrote:
quoted
On Tue, 10 Oct 2017, Geert Uytterhoeven wrote:
quoted
Document the new optional "rohm,ddr-backup-power" property.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
 Documentation/devicetree/bindings/mfd/bd9571mwv.txt | 7 +++++++
 1 file changed, 7 insertions(+)
diff --git a/Documentation/devicetree/bindings/mfd/bd9571mwv.txt b/Documentation/devicetree/bindings/mfd/bd9571mwv.txt
index 9ab216a851d5619b..7ea3f2db41d4e501 100644
--- a/Documentation/devicetree/bindings/mfd/bd9571mwv.txt
+++ b/Documentation/devicetree/bindings/mfd/bd9571mwv.txt
@@ -25,6 +25,12 @@ Required properties:
                          Each child node is defined using the standard
                          binding for regulators.

+Optional properties:
+  - rohm,ddr-backup-power : Value to use for DDR-Backup Power.  This controls
+                         which DDR rails need to be kept powered when backup
+                         mode is enabled, cfr. the KEEPON_DDR* bits in the
Perhaps it's just me, but I'm confused by this line.

Can you word it another way?
I'll ttry... Let me think a bit about it...
I think it's just the "cfr" which is throwing me.
quoted
quoted
+                         documentation for the "BKUP Mode Cnt" register.
+
 Example:

      pmic: pmic@30 {
@@ -36,6 +42,7 @@ Example:
              #interrupt-cells = <2>;
              gpio-controller;
              #gpio-cells = <2>;
+             rohm,ddr-backup-power = <15>;
Can you explain what this means?  Is it a mask, or does line 15 need
to be kept on?  What is the range?  Is 0 acceptable?  Clarification
required please.
It's a mask (OR of (in this case all four) needed KEEPON_DDR* bits).
Unfortunately the datasheet is not publicly available.

0 is acceptable, but as the property is optional, you better just leave it out.
Would you mind reflecting that in the doc please?

Maybe a few more examples will help?

-- 
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org │ Open source software for ARM SoCs
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