On Sun, Mar 13, 2016 at 10:19 PM, Dave Airlie [off-list ref] wrote:

On 11 March 2016 at 23:45, Rafael J. Wysocki [off-list ref] wrote:

quoted

On Friday, March 11, 2016 12:58:15 PM Mika Westerberg wrote:

quoted

On Thu, Mar 10, 2016 at 09:57:09PM +0100, Rafael J. Wysocki wrote:

quoted

quoted

It doesn't seem to do any runtime PM,
I do wonder if pcieport should be doing it's own runtime PM handling,
but that is a
larger task than I'm thinking to tackle here.

PCIe ports don't do PM - yet.  Mika has posted a series of patches to implement
that, however, that are waiting for comments now:

https://patchwork.kernel.org/patch/8453311/
https://patchwork.kernel.org/patch/8453381/
https://patchwork.kernel.org/patch/8453391/
https://patchwork.kernel.org/patch/8453411/
https://patchwork.kernel.org/patch/8453371/
https://patchwork.kernel.org/patch/8453351/

quoted

Maybe I should be doing

pci_set_power_state(pdev->bus->self, PCI_D3cold) ? I'm not really sure.

Using pci_set_power_state() would be more appropriate IMO, but you can get
to the bridge via dev->parent too, can't you?

In any case, it looks like you and Mika need to talk. :-)

When the vga_switcheroo device gets runtime suspended (with the above
runtime PM patchs for PCIe root ports) the root port should also be
runtime suspended by the PM core.

Right, after your patches have been applied, the additional handling
won't be needed.

So Dave, maybe you can check if the Mika's patches help?

Hi Mika,

I tested your patches with a couple of changes on the Lenovo W541.

The attached patch contains the two things I needed to get the same
functionality
as my patches.

I'm really not in love with the per-chipset enablement for this,
really any chipsets
after a certain year should probably be better, as we'll constantly be
adding PCI Ids
for every chipset ever made, and I expect we'll forget some.

Yeah, I don't care of that either.  There are always going to be
chipsets falling through the cracks.

Alex

Dave.

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