[PATCH 05/16] tools/power turbostat: Decode MSR_MISC_PWR_MGMT
From: Len Brown <lenb@kernel.org>
Date: 2016-02-27 09:01:53
Subsystem:
the rest, turbostat utility · Maintainers:
Linus Torvalds, "Len Brown"
From: Len Brown <lenb@kernel.org>
Date: 2016-02-27 09:01:53
Subsystem:
the rest, turbostat utility · Maintainers:
Linus Torvalds, "Len Brown"
From: Len Brown <redacted> This MSR is helpful to show if P-state HW coordination is enabled or disabled. Signed-off-by: Len Brown <redacted> --- tools/power/x86/turbostat/turbostat.c | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+)
diff --git a/tools/power/x86/turbostat/turbostat.c b/tools/power/x86/turbostat/turbostat.c
index af3b955..c600340 100644
--- a/tools/power/x86/turbostat/turbostat.c
+++ b/tools/power/x86/turbostat/turbostat.c@@ -2783,6 +2783,26 @@ void decode_misc_enable_msr(void) msr & (1 << 18) ? "MONITOR" : ""); } +/* + * Decode MSR_MISC_PWR_MGMT + * + * Decode the bits according to the Nehalem documentation + * bit[0] seems to continue to have same meaning going forward + * bit[1] less so... + */ +void decode_misc_pwr_mgmt_msr(void) +{ + unsigned long long msr; + + if (!do_nhm_platform_info) + return; + + if (!get_msr(base_cpu, MSR_MISC_PWR_MGMT, &msr)) + fprintf(stderr, "cpu%d: MSR_MISC_PWR_MGMT: 0x%08llx (%sable-EIST_Coordination %sable-EPB)\n", + base_cpu, msr, + msr & (1 << 0) ? "DIS" : "EN", + msr & (1 << 1) ? "EN" : "DIS"); +} void process_cpuid() {
@@ -2936,6 +2956,9 @@ void process_cpuid() do_slm_cstates = is_slm(family, model); do_knl_cstates = is_knl(family, model); + if (debug) + decode_misc_pwr_mgmt_msr(); + rapl_probe(family, model); perf_limit_reasons_probe(family, model);
--
2.7.1.339.g0233b80