[PATCH v5 5/5] arm64: dts: qcom: hamoa: Extend QMPPHY description for USB4
From: Konrad Dybcio <konradybcio@kernel.org>
Date: 2026-09-08 07:54:45
Also in:
linux-arm-msm, linux-devicetree, lkml
Subsystem:
arm/qualcomm mailing list, arm/qualcomm support, the rest · Maintainers:
Bjorn Andersson, Konrad Dybcio, Linus Torvalds
From: Konrad Dybcio <redacted> The USB4 part of the QMPPHY requires that one more GCC clock (P2RR2P - PHY-to-Router, Router-to-PHY) is enabled for the PHY to initialize successfully. Describe that. Reviewed-by: Dmitry Baryshkov <redacted> Reviewed-by: Abel Vesa <redacted> Acked-by: Manivannan Sadhasivam <redacted> Signed-off-by: Konrad Dybcio <redacted> --- arch/arm64/boot/dts/qcom/hamoa.dtsi | 18 ++++++++++++------ 1 file changed, 12 insertions(+), 6 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/hamoa.dtsi b/arch/arm64/boot/dts/qcom/hamoa.dtsi
index 5e92645c5c3c..4df45d9176f7 100644
--- a/arch/arm64/boot/dts/qcom/hamoa.dtsi
+++ b/arch/arm64/boot/dts/qcom/hamoa.dtsi@@ -2838,11 +2838,13 @@ usb_1_ss0_qmpphy: phy@fd5000 { clocks = <&gcc GCC_USB3_PRIM_PHY_AUX_CLK>, <&rpmhcc RPMH_CXO_CLK>, <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>, - <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>; + <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>, + <&gcc GCC_USB4_0_PHY_P2RR2P_PIPE_CLK>; clock-names = "aux", "ref", "com_aux", - "usb3_pipe"; + "usb3_pipe", + "p2rr2p_pipe"; power-domains = <&gcc GCC_USB_0_PHY_GDSC>;
@@ -2909,11 +2911,13 @@ usb_1_ss1_qmpphy: phy@fda000 { clocks = <&gcc GCC_USB3_SEC_PHY_AUX_CLK>, <&tcsr TCSR_USB4_1_CLKREF_EN>, <&gcc GCC_USB3_SEC_PHY_COM_AUX_CLK>, - <&gcc GCC_USB3_SEC_PHY_PIPE_CLK>; + <&gcc GCC_USB3_SEC_PHY_PIPE_CLK>, + <&gcc GCC_USB4_1_PHY_P2RR2P_PIPE_CLK>; clock-names = "aux", "ref", "com_aux", - "usb3_pipe"; + "usb3_pipe", + "p2rr2p_pipe"; power-domains = <&gcc GCC_USB_1_PHY_GDSC>;
@@ -2980,11 +2984,13 @@ usb_1_ss2_qmpphy: phy@fdf000 { clocks = <&gcc GCC_USB3_TERT_PHY_AUX_CLK>, <&tcsr TCSR_USB4_2_CLKREF_EN>, <&gcc GCC_USB3_TERT_PHY_COM_AUX_CLK>, - <&gcc GCC_USB3_TERT_PHY_PIPE_CLK>; + <&gcc GCC_USB3_TERT_PHY_PIPE_CLK>, + <&gcc GCC_USB4_2_PHY_P2RR2P_PIPE_CLK>; clock-names = "aux", "ref", "com_aux", - "usb3_pipe"; + "usb3_pipe", + "p2rr2p_pipe"; power-domains = <&gcc GCC_USB_2_PHY_GDSC>;
--
2.55.0
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