RE: [PATCH v3 07/12] dt-bindings: PCI: Add support for Tesla FSD SoC
From: Shradha Todi <hidden>
Date: 2025-08-18 17:27:37
Also in:
linux-arm-kernel, linux-devicetree, linux-pci, linux-samsung-soc, lkml
quoted
+ + phys: + maxItems: 1 + + samsung,syscon-pcie: + $ref: /schemas/types.yaml#/definitions/phandle-array + description: phandle for system control registers, used to + control signals at system levelWhat is "system level"? and what are these "signals" being controlled?
I will add a more detailed description for why the syscon is being used
quoted
+title: Tesla FSD SoC series PCIe Host Controller + +maintainers: + - Shradha Todi [off-list ref] + +description: + Tesla FSD SoCs PCIe host controller inherits all the common + properties defined in samsung,exynos-pcie.yaml + +allOf: + - $ref: /schemas/pci/samsung,exynos-pcie.yaml# + +properties: + compatible: + const: tesla,fsd-pcie + + clocks: + maxItems: 4 + + clock-names: + items: + - const: aux + - const: dbi + - const: mstr + - const: slv + + num-lanes: + maximum: 4 + + samsung,syscon-pcie: + $ref: /schemas/types.yaml#/definitions/phandle-array + description: phandle for system control registers, used to + control signals at system level + +required: + - samsung,syscon-pcieclocks are required, compatible as well.
Since this was inheriting the common exynos yaml file and that had these properties under required, I did not mention again. Will take care in next version.
Missing supplies, both as properties and required. PCI devices do not work without power.
According to the HW design of FSD SoC, the control to manage PCIe power is given to a separate CPU where custom firmware runs. Therefore, the Linux side does not control the PCIe power supplies directly and are hence not included in the device tree.
quoted
+ +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/clock/fsd-clk.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + + soc { + #address-cells = <2>; + #size-cells = <2>; + + pcierc1: pcie@16b00000 { + compatible = "tesla,fsd-pcie"; + reg = <0x0 0x16b00000 0x0 0x2000>, + <0x0 0x168c0000 0x0 0x1000>, + <0x0 0x18000000 0x0 0x1000>; + reg-names = "dbi", "elbi", "config"; + ranges = <0x82000000 0x0 0x18001000 0x0 0x18001000 0x0 0xffefff>;Misaligned. Follow closely DTS coding style.
Will take care. -- linux-phy mailing list linux-phy@lists.infradead.org https://lists.infradead.org/mailman/listinfo/linux-phy