On Fri, 25 Jul 2025 18:22:28 +0800, Ziyue Zhang wrote:

This series drop gcc_aux_clock in pcie phy, the pcie aux clock should
be gcc_phy_aux_clock. And sa8775p platform support link_down reset in
hardware, so add it for both pcie0 and pcie1 to provide a better user
experience.

Have follwing changes:
  - Update pcie phy bindings for sa8775p.
  - Document link_down reset.
  - Remove aux clock from pcie phy.
  - Add link_down reset for pcie.

[...]

Applied, thanks!

[2/3] arm64: dts: qcom: sa8775p: remove aux clock from pcie phy
      commit: d41fb878adf64ef5dc4b4c25419e875483f62fe2
[3/3] arm64: dts: qcom: sa8775p: add link_down reset for pcie
      commit: f0370265b1d7fc169956927aa62c3abc375743b5

Best regards,
-- 
Bjorn Andersson [off-list ref]

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