On Thu, Jan 09, 2025 at 11:27:09AM +0800, Damon Ding wrote:
The PHY is based on a Samsung IP block that supports HDMI 2.1, and eDP
1.4b. RK3588 integrates the Analogix eDP 1.3 TX controller IP and the
HDMI/eDP TX Combo PHY to support eDP display.
Add basic support for RBR/HBR/HBR2 link rates, and the voltage swing and
pre-emphasis configurations of each link rate are set according to the
eDP 1.3 requirements.
Signed-off-by: Damon Ding <redacted>
---
Changes in v2:
- Add the module author
Changes in v3:
- Split this patch into two, one for correction and the other for
extension
Changes in v4:
- Add link_rate and lanes parameters in struct rk_hdptx_phy to store the
phy_configure() result for &phy_configure_opts.dp.link_rate and
&phy_configure_opts.dp.lanes
Changes in v5:
- Reuse the existing functions rk_hdptx_phy_consumer_get() and
rk_hdptx_phy_consumer_put()
- Return 0 instead of -EINVAL in rk_hdptx_phy_configure()
- Remove rk_hdptx_phy_lane_disable() and related check of 0 lanes
- Mention the design details in the commit message
- Remove unnecessary rk_hdptx_phy_set_mode()
---
.../phy/rockchip/phy-rockchip-samsung-hdptx.c | 879 +++++++++++++++++-
1 file changed, 869 insertions(+), 10 deletions(-)
Reviewed-by: Dmitry Baryshkov <redacted>
--
With best wishes
Dmitry
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