[DO NOT MERGE PATCH v4 15/19] dt-bindings: firmware: imx: Add SCU controlled display pixel link nodes
From: Liu Ying <victor.liu@nxp.com>
Date: 2024-11-25 09:35:01
Also in:
dri-devel, imx, linux-arm-kernel, linux-devicetree, lkml
Subsystem:
arm/freescale imx / mxc arm architecture, open firmware and flattened device tree bindings, the rest · Maintainers:
Frank Li, Sascha Hauer, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Linus Torvalds
Document SCU controlled display pixel link child nodes. Signed-off-by: Liu Ying <victor.liu@nxp.com> --- v4: * No change. v3: * No change. v2: * New patch as needed by display controller subsystem device tree. .../devicetree/bindings/firmware/fsl,scu.yaml | 20 +++++++++++++++++++ 1 file changed, 20 insertions(+)
diff --git a/Documentation/devicetree/bindings/firmware/fsl,scu.yaml b/Documentation/devicetree/bindings/firmware/fsl,scu.yaml
index 557e524786c2..1a920f013ad2 100644
--- a/Documentation/devicetree/bindings/firmware/fsl,scu.yaml
+++ b/Documentation/devicetree/bindings/firmware/fsl,scu.yaml@@ -30,6 +30,26 @@ properties: Clock controller node that provides the clocks controlled by the SCU $ref: /schemas/clock/fsl,scu-clk.yaml + dc0-pixel-link0: + description: + Display pixel link0 in display controller subsystem0 controlled by the SCU + $ref: /schemas/display/bridge/fsl,imx8qxp-pixel-link.yaml + + dc0-pixel-link1: + description: + Display pixel link1 in display controller subsystem0 controlled by the SCU + $ref: /schemas/display/bridge/fsl,imx8qxp-pixel-link.yaml + + dc1-pixel-link0: + description: + Display pixel link0 in display controller subsystem1 controlled by the SCU + $ref: /schemas/display/bridge/fsl,imx8qxp-pixel-link.yaml + + dc1-pixel-link1: + description: + Display pixel link1 in display controller subsystem1 controlled by the SCU + $ref: /schemas/display/bridge/fsl,imx8qxp-pixel-link.yaml + gpio: description: Control the GPIO PINs on SCU domain over the firmware APIs
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2.34.1
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