[PATCH v3 0/9] PHY: Prepare Cadence Torrent PHY driver to support multilink DP
From: Swapnil Jakhade <hidden>
Date: 2021-07-28 14:55:45
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This patch series enables Torrent PHY driver to support different input reference clock frequencies. It also does the basic cleanup in order to add support for multilink DP configurations. The multilink DP series at [1] will be split in 2 parts and sent separately. This is part 1 of the series. Support for DP multilink configurations with register sequences will be added in part 2 as a separate patch series after validation. [1] https://lore.kernel.org/patchwork/cover/1410252/ Version History: v3: - Fixed register offset macro for PHY PCS lane registers in 9/9 v2: - Removed multilink DP support and register configuration patches - Fixed v1 review comments - Added Reviewed-by: Kishon Vijay Abraham I [off-list ref] to patches 1/9, 3/9 and 7/9 Swapnil Jakhade (9): phy: cadence-torrent: Remove use of CamelCase to fix checkpatch CHECK message phy: cadence-torrent: Reorder few functions to remove function declarations phy: cadence-torrent: Add enum for supported input reference clock frequencies phy: cadence-torrent: Configure PHY registers as a function of input reference clock rate phy: cadence-torrent: Add PHY registers for DP in array format phy: cadence-torrent: Add PHY configuration for DP with 100MHz ref clock phy: cadence-torrent: Add separate functions for reusable code phy: cadence-torrent: Add debug information for PHY configuration phy: cadence-torrent: Check PIPE mode PHY status to be ready for operation drivers/phy/cadence/phy-cadence-torrent.c | 3181 ++++++++++++--------- 1 file changed, 1750 insertions(+), 1431 deletions(-) -- 2.26.1 -- linux-phy mailing list linux-phy@lists.infradead.org https://lists.infradead.org/mailman/listinfo/linux-phy