RE: [PATCH v2 01/11] dt-bindings: phy: renesas: Document RZ/G2L USB PHY Control bindings
From: Biju Das <biju.das.jz@bp.renesas.com>
Date: 2021-06-23 13:38:51
Also in:
linux-devicetree, linux-renesas-soc
Hi Rob, Thanks for the feedback.
Subject: Re: [PATCH v2 01/11] dt-bindings: phy: renesas: Document RZ/G2L USB PHY Control bindings On Mon, Jun 21, 2021 at 10:39:33AM +0100, Biju Das wrote:quoted
Add device tree binding document for RZ/G2L USB PHY control driver. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> --- V1->V2: * Add clock properties --- .../phy/renesas,rzg2l-usbphyctrl.yaml | 65 +++++++++++++++++++ 1 file changed, 65 insertions(+) create mode 100644 Documentation/devicetree/bindings/phy/renesas,rzg2l-usbphyctrl.yaml diff --git a/Documentation/devicetree/bindings/phy/renesas,rzg2l-usbphyctrl.yaml b/Documentation/devicetree/bindings/phy/renesas,rzg2l-usbphyctrl.yaml new file mode 100644 index 000000000000..8e8ba43f595d--- /dev/null +++ b/Documentation/devicetree/bindings/phy/renesas,rzg2l-usbphyctrl.y +++ aml@@ -0,0 +1,65 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 +--- +$id: +https://jpn01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fdevi +cetree.org%2Fschemas%2Fphy%2Frenesas%2Crzg2l-usbphyctrl.yaml%23&d +ata=04%7C01%7Cbiju.das.jz%40bp.renesas.com%7Cc6bbf5f6ce334eaa722a08d9 +359f07ad%7C53d82571da1947e49cb4625a166a4a2a%7C0%7C0%7C637599779421910 +039%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBT +iI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&sdata=Jcf6Om4DehifCe1KO1rmt5LxTB +6jtGoQLD1MoqWGM%2F0%3D&reserved=0 +$schema: +https://jpn01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fdevi +cetree.org%2Fmeta-schemas%2Fcore.yaml%23&data=04%7C01%7Cbiju.das. +jz%40bp.renesas.com%7Cc6bbf5f6ce334eaa722a08d9359f07ad%7C53d82571da19 +47e49cb4625a166a4a2a%7C0%7C0%7C637599779421910039%7CUnknown%7CTWFpbGZ +sb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0% +3D%7C1000&sdata=LlqPRLf9%2BGrEdSapxCFhwxVKcXTVh9ECr%2FXPN0SIzi4%3 +D&reserved=0 + +title: Renesas RZ/G2L USB2.0 PHY Control + +maintainers: + - Biju Das <biju.das.jz@bp.renesas.com> + +description: + The RZ/G2L USB2.0 PHY Control mainly controls reset and power down +of the + USB/PHY. + +properties: + compatible: + items: + - enum: + - renesas,r9a07g044-usbphyctrl # RZ/G2{L,LC} + - const: renesas,rzg2l-usbphyctrl + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + resets: + maxItems: 1 + + power-domains: + maxItems: 1 + + '#phy-cells': + # see phy-bindings.txt in the same directory + const: 1 + description: | + The phandle's argument in the PHY specifier is the phy resetcontrol bitquoted
+ of usb phy control. + 0 = Port 1 Phy reset + 1 = Port 2 Phy reset + enum: [ 0, 1 ]You already have the const, so this doesn't do anything.
OK, will take out const.
quoted
+ +required: + - compatible + - reg + - clocks + - '#phy-cells' + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/r9a07g044-cpg.h> + + usbphyctrl@11c40000 {usb-phy@...
The IP is called USBPHY control. It mainly controls reset and power down of the USB2.0/PHY. So not sure usb-phy is right one here ? I prefer usb-phy-ctrl instead. Is it ok? Please let me know. Cheers, Biju
quoted
+ compatible = "renesas,r9a07g044-usbphyctrl", + "renesas,rzg2l-usbphyctrl"; + reg = <0x11c40000 0x10000>; + clocks = <&cpg CPG_MOD R9A07G044_USB_PCLK>; + resets = <&cpg R9A07G044_USB_PCLK>; + power-domains = <&cpg>; + #phy-cells = <1>; + }; -- 2.17.1
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