Thread (20 messages) 20 messages, 7 authors, 29d ago

Re: [PATCH 2/2] perf/x86: Disable precise sampling for PERF_SAMPLE_STACK_USER

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From: Mi, Dapeng <hidden>
Date: 2026-09-09 01:59:46
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On 9/9/2026 9:28 AM, Ravi Bangoria wrote:
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Having PERF_SAMPLE_IP be precise and the user registers from the
interrupt I believe works for AMD IBS and ARM SPE, but for Intel PEBS
there is the ability to use the PEBS register samples for other
non-redundant registers. In the x86 driver could we disable PEBS
sampling for these registers when doing user stack sampling, so that
the sampled user registers match the stack sample? We can keep the
PERF_SAMPLE_IP precise, and make all the registers precise when there
is no stack sampling.
That sounds the best way to fix this issue by decoupling PERF_SAMPLE_IP
with PERF_REG_X86_IP. Then we can keep the precise SAMPLE_IP and the PMI
context user register snapshot simultaneously.
With this, PERF_SAMPLE_IP and PERF_REG_X86_IP might be from different
privileges. So, any perf code that depends on user_mode(regs) (e.g.
perf_exclude_event(), _REGS_USER, _REGS_INTR, header->misc, etc.) also
needs to be inspected/modified accordingly.
Yeah, this introduces the inconsistency between PERF_SAMPLE_IP and the
pt_regs, but I suppose it should be fine. I didn't look at the details yet,
but all places which call user_mode(regs) should not be impacted in theory.
As long as we ensure the PERF_SAMPLE_IP doesn't leak security information
like kernel address, I suppose it should be fine. 

Thanks.

Thanks,
Ravi
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