Re: [PATCH v5 4/9] perf/x86: Add compiler barrier after updating BTS
From: Leo Yan <hidden>
Date: 2021-08-29 10:57:08
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Hi Peter, or any x86 maintainer, On Mon, Aug 09, 2021 at 07:14:02PM +0800, Leo Yan wrote:
Since BTS is coherent, simply add a compiler barrier to separate the BTS update and aux_head store.
Could you reivew this patch and check if BTS needs the comipler barrier in this case? Thanks.
quoted hunk ↗ jump to hunk
Signed-off-by: Leo Yan <redacted> --- arch/x86/events/intel/bts.c | 6 ++++++ 1 file changed, 6 insertions(+)diff --git a/arch/x86/events/intel/bts.c b/arch/x86/events/intel/bts.c index 6320d2cfd9d3..974e917e65b2 100644 --- a/arch/x86/events/intel/bts.c +++ b/arch/x86/events/intel/bts.c@@ -209,6 +209,12 @@ static void bts_update(struct bts_ctx *bts) } else { local_set(&buf->data_size, head); } + + /* + * Since BTS is coherent, just add compiler barrier to ensure + * BTS updating is ordered against bts::handle::event. + */ + barrier(); } static int-- 2.25.1