[PATCH 4/4] x86/tsx: Add cmdline tsx=fake to not clear CPUID bits RTM and HLE
From: Pawan Gupta <pawan.kumar.gupta@linux.intel.com>
Date: 2021-06-09 21:14:48
Also in:
linux-doc, lkml
Subsystem:
documentation, the rest, x86 architecture (32-bit and 64-bit), x86 hardware vulnerabilities · Maintainers:
Jonathan Corbet, Linus Torvalds, Thomas Gleixner, Ingo Molnar, Borislav Petkov, Dave Hansen, Peter Zijlstra, Josh Poimboeuf
On CPUs that deprecated TSX, clearing the enumeration bits CPUID.RTM and CPUID.HLE may not be desirable in some corner cases. Like a saved guest would refuse to resume if it was saved before the microcode update that deprecated TSX. Add a cmdline option "tsx=fake" to not clear CPUID bits even when the hardware always aborts TSX transactions. Suggested-by: Tony Luck <tony.luck@intel.com> Suggested-by: Andi Kleen <redacted> Signed-off-by: Pawan Gupta <pawan.kumar.gupta@linux.intel.com> Reviewed-by: Andi Kleen <redacted> Reviewed-by: Tony Luck <tony.luck@intel.com> Tested-by: Neelima Krishnan <redacted> --- Documentation/admin-guide/kernel-parameters.txt | 3 +++ arch/x86/kernel/cpu/bugs.c | 5 +++-- arch/x86/kernel/cpu/cpu.h | 1 + arch/x86/kernel/cpu/tsx.c | 7 +++++-- 4 files changed, 12 insertions(+), 4 deletions(-)
diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt
index cb89dbdedc46..ced9e5596163 100644
--- a/Documentation/admin-guide/kernel-parameters.txt
+++ b/Documentation/admin-guide/kernel-parameters.txt@@ -5693,6 +5693,9 @@ auto - Disable TSX if X86_BUG_TAA is present, otherwise enable TSX on the system. + fake - Do not clear the CPUID bits RTM and HLE even + when hardware always aborts TSX transactions. + Not specifying this option is equivalent to tsx=off. See Documentation/admin-guide/hw-vuln/tsx_async_abort.rst
diff --git a/arch/x86/kernel/cpu/bugs.c b/arch/x86/kernel/cpu/bugs.c
index d41b70fe4918..46fcc392a339 100644
--- a/arch/x86/kernel/cpu/bugs.c
+++ b/arch/x86/kernel/cpu/bugs.c@@ -316,8 +316,9 @@ static void __init taa_select_mitigation(void) return; } - /* TSX previously disabled by tsx=off */ - if (!boot_cpu_has(X86_FEATURE_RTM)) { + /* TSX previously disabled by tsx=off or by microcode */ + if (!boot_cpu_has(X86_FEATURE_RTM) || + boot_cpu_has(X86_FEATURE_RTM_ALWAYS_ABORT)) { taa_mitigation = TAA_MITIGATION_TSX_DISABLED; goto out; }
diff --git a/arch/x86/kernel/cpu/cpu.h b/arch/x86/kernel/cpu/cpu.h
index 95521302630d..84a479866c4b 100644
--- a/arch/x86/kernel/cpu/cpu.h
+++ b/arch/x86/kernel/cpu/cpu.h@@ -49,6 +49,7 @@ enum tsx_ctrl_states { TSX_CTRL_ENABLE, TSX_CTRL_DISABLE, TSX_CTRL_RTM_ALWAYS_ABORT, + TSX_CTRL_FAKE, TSX_CTRL_NOT_SUPPORTED, };
diff --git a/arch/x86/kernel/cpu/tsx.c b/arch/x86/kernel/cpu/tsx.c
index 5ed99811504c..2f8e50584297 100644
--- a/arch/x86/kernel/cpu/tsx.c
+++ b/arch/x86/kernel/cpu/tsx.c@@ -113,6 +113,8 @@ void __init tsx_init(void) tsx_ctrl_state = TSX_CTRL_DISABLE; } else if (!strcmp(arg, "auto")) { tsx_ctrl_state = x86_get_tsx_auto_mode(); + } else if (!strcmp(arg, "fake")) { + tsx_ctrl_state = TSX_CTRL_FAKE; } else { tsx_ctrl_state = TSX_CTRL_DISABLE; pr_err("invalid option, defaulting to off\n");
@@ -131,9 +133,10 @@ void __init tsx_init(void) * Hardware will always abort a TSX transaction if both CPUID bits * RTM_ALWAYS_ABORT and TSX_FORCE_ABORT are enumerated. In this case it * is better not to enumerate CPUID.RTM and CPUID.HLE bits. Clear them - * here. + * here, except when user requested not to clear via cmdline tsx=fake. */ - if (boot_cpu_has(X86_FEATURE_RTM_ALWAYS_ABORT) && + if (tsx_ctrl_state != TSX_CTRL_FAKE && + boot_cpu_has(X86_FEATURE_RTM_ALWAYS_ABORT) && boot_cpu_has(X86_FEATURE_TSX_FORCE_ABORT)) { tsx_ctrl_state = TSX_CTRL_RTM_ALWAYS_ABORT; tsx_clear_cpuid();
--
git-series 0.9.1