Hi Kim,

Thanks for your response.
I talked a bit with Mark Rutland from Arm about this. He told me that
perf can reset or modify the cycle counter from kernelspace as it
pleases even if the user is not using perf. Reading the cycle counter
directly from userspace is not supported. The only supported way to
read the cycle counter is to go through the VDSO.

On Fri, Sep 8, 2017 at 5:07 PM, Kim Phillips [off-list ref] wrote:

On Wed, 6 Sep 2017 17:36:36 -0700
Jason Teplitz [off-list ref] wrote:

[adding linux-arm-kernel]

quoted

I'm reading the armv8 PMU cycle counter from userspace and noticing
that it gets periodically reset by something. Does anything inside the
kernel reset these counters? I am not using perf, so I'm not sure why
anything else would be touching them.

PMCCNTR only shows up in kernel perf/PMU and KVM code, so yes, no
reason for it to be reset, esp. if no arm-pmu interrupts are triggered.

Is the period constant, as if to suggest a wraparound?  Can you use
CNTVCT instead?

Thanks,

Kim