[PATCH 11/42] PCI: aardvark: Do not touch status bits of masked interrupts in interrupt handler
From: Pali Rohár <pali@kernel.org>
Date: 2021-05-06 15:35:55
Also in:
linux-arm-kernel, lkml
Subsystem:
pci driver for aardvark (marvell armada 3700), pci native host bridge and endpoint drivers, pci subsystem, the rest · Maintainers:
Thomas Petazzoni, Pali Rohár, Lorenzo Pieralisi, Krzysztof Wilczyński, Manivannan Sadhasivam, Bjorn Helgaas, Linus Torvalds
It is incorrect to clear status bits of masked interrupts. The aardvark driver clears all status interrupt bits when no unmasked status bit was set. When some unmasked bit was set then masked bits were not cleared. Fix this so that masked bits are never cleared. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Marek Behún <kabel@kernel.org> Cc: stable@vger.kernel.org --- drivers/pci/controller/pci-aardvark.c | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/drivers/pci/controller/pci-aardvark.c b/drivers/pci/controller/pci-aardvark.c
index cd4b427d7692..362faddae935 100644
--- a/drivers/pci/controller/pci-aardvark.c
+++ b/drivers/pci/controller/pci-aardvark.c@@ -1090,11 +1090,8 @@ static void advk_pcie_handle_int(struct advk_pcie *pcie) isr1_mask = advk_readl(pcie, PCIE_ISR1_MASK_REG); isr1_status = isr1_val & ((~isr1_mask) & PCIE_ISR1_ALL_MASK); - if (!isr0_status && !isr1_status) { - advk_writel(pcie, isr0_val, PCIE_ISR0_REG); - advk_writel(pcie, isr1_val, PCIE_ISR1_REG); + if (!isr0_status && !isr1_status) return; - } /* Process MSI interrupts */ if (isr0_status & PCIE_ISR0_MSI_INT_PENDING)
--
2.20.1