Re: [PATCH v5 4/4] PCI: Add runtime PM support for PCIe ports

On Mon, Jun 20, 2016 at 11:10:57AM +0300, Mika Westerberg wrote:

On Fri, Jun 17, 2016 at 11:32:09PM +0200, Lukas Wunner wrote:

quoted

On Fri, Jun 17, 2016 at 03:48:24PM -0500, Bjorn Helgaas wrote:

quoted

On Fri, Apr 29, 2016 at 11:51:59AM +0300, Mika Westerberg wrote:

[snip]

quoted

quoted

+
+	/*
+	 * Prevent runtime PM if the port is advertising support for PCIe
+	 * hotplug. Otherwise the BIOS hotplug SMI code might not be able
+	 * to enumerate devices behind this port properly (the port is
+	 * powered down preventing all config space accesses to the
+	 * subordinate devices). We can't be sure for native PCIe hotplug
+	 * either so prevent that as well.

Can we wordsmith this comment a bit?  I'm not sure what "BIOS hotplug
SMI code" even is or why it is relevant.  And it seems x86-centric so
may not apply to other arches.

The comment pertains to:
https://bugzilla.kernel.org/show_bug.cgi?id=53811

It was discussed on April 12/13:
https://patchwork.kernel.org/patch/8782801/

Executive summary:
On non-Macs, Thunderbolt is driven by the firmware in System Management
Mode, on hotplug the CPU receives a Sytem Management Interrupt (SMI) and
jumps to SMM code. This doesn't work reliably if the hotplug port has
been transitioned to D3hot, the SMM code tries to access config space
of hotplugged devices (not possible if port is in D3hot) and is apparently
too dumb to check if the port is in D3hot and wake it up.

That's the best guess what happens on non-Macs.

Bjorn, do you want me to update the comment to open up what SMI means
and maybe add better explanation?

I withdraw my request.  I guess it's probably not worth doing anything
right now.  It's just a little out of place because this is
theoretically generic code, but the whole SMM thing is x86-specific.

Bjorn