On Mon, Nov 5, 2012 at 3:56 PM, Rob Herring [off-list ref] wrote:

On 11/05/2012 08:34 AM, Grant Likely wrote:

quoted

Good. I'm about 80% though putting together a project plan of what is
required to implement this. I'll post it for RFC shortly. I would
appreciate feedback and help on flushing out the design.

The FPGA folks are also interested in dynamic DT configuration. There's
been some discussion and postings on the DT list in the last few months
you may have missed. It's maybe not completely the same use case, but
there is some overlap here.

It should be very similar. I'll see if I can dig up those conversations.

g.