On Sat, Sep 25, 2021 at 06:31:58PM +1000, Benjamin Herrenschmidt wrote:

On Sat, 2021-09-25 at 12:02 +0900, Keith Busch wrote:

quoted

Different submission queue groups per NVM Set sounds right for this
feature, but I'm not sure it makes sense for these to have their own
completion queues: completions from different sets would try to
schedule on the same CPU. I think it should be more efficient to
break the 1:1
SQ:CQ pairing, and instead have all the SQs with the same CPU
affinity share a single CQ so that completions from different
namespaces could be handled in a single interrupt.

Can this be an incremental improvement ?

Honestly I'd rather not merge this whole patchset at all.  It is a
completly frinde feature for a totally misdesigned part of the NVMe
spec.  Until actual controller in the hands of prosumers support
anything like that I'm very reluctant to bloat the driver fast path for
it.

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