On Fri, 31 Aug 2018, Joerg Roedel wrote:

On Fri, Aug 31, 2018 at 07:12:44AM +0300, Meelis Roos wrote:

quoted

quoted

Thanks for the report! I'll try to reproduce the problem tomorrow and
investigate it. Can you please check if any of the kernel configurations
that show the bug has CONFIG_X86_PAE set? If not, can you please test
if enabling this option still triggers the problem?

Will check, but out of my memery there were 2 G3 HP Proliants that did 
not fit into the pattern (problem did not appear). I have more than 4G 
RAM in those and HIGHMEM_4G there, maybe that's it?

Yeah, I thought a bit about it, and for legacy paging the PMD paging
level is the root-level where we do the mirroring between kernel and
user page-table for PTI. This means we also need to collect A/D bits
from both entries, which we don't do yet.

But that all means it shouldn't happen with CONFIG_X86_PAE=y.

I'll try to reproduce and work on a fix.

Any progress on this?

Thanks,

	tglx