[PATCHv7 06/19] x86/boot/compressed/64: Detect and handle 5-level paging at boot-time
From: Kirill A. Shutemov <hidden>
Date: 2017-09-18 10:56:17
Also in:
lkml
Subsystem:
the rest, x86 architecture (32-bit and 64-bit) · Maintainers:
Linus Torvalds, Thomas Gleixner, Ingo Molnar, Borislav Petkov, Dave Hansen
This patch prepare decompression code to boot-time switching between 4- and 5-level paging. Signed-off-by: Kirill A. Shutemov <redacted> --- arch/x86/boot/compressed/head_64.S | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+)
diff --git a/arch/x86/boot/compressed/head_64.S b/arch/x86/boot/compressed/head_64.S
index b4a5d284391c..09c85e8558eb 100644
--- a/arch/x86/boot/compressed/head_64.S
+++ b/arch/x86/boot/compressed/head_64.S@@ -288,6 +288,28 @@ ENTRY(startup_64) leaq boot_stack_end(%rbx), %rsp #ifdef CONFIG_X86_5LEVEL + /* Preserve rbx across cpuid */ + movq %rbx, %r8 + + /* Check if leaf 7 is supported */ + xorl %eax, %eax + cpuid + cmpl $7, %eax + jb lvl5 + + /* + * Check if la57 is supported. + * The feature is enumerated with CPUID.(EAX=07H, ECX=0):ECX[bit 16] + */ + movl $7, %eax + xorl %ecx, %ecx + cpuid + andl $(1 << 16), %ecx + jz lvl5 + + /* Restore rbx */ + movq %r8, %rbx + /* Check if 5-level paging has already enabled */ movq %cr4, %rax testl $X86_CR4_LA57, %eax
@@ -327,6 +349,8 @@ ENTRY(startup_64) pushq %rax lretq lvl5: + /* Restore rbx */ + movq %r8, %rbx #endif /* Zero EFLAGS */
--
2.14.1
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