On 06/25/2012 06:01 PM, Konrad Rzeszutek Wilk wrote:

On Mon, Jun 25, 2012 at 12:14 PM, Seth Jennings
[off-list ref] wrote:

quoted

This patch adds support for a local_tlb_flush_kernel_range()
function for the x86 arch.  This function allows for CPU-local
TLB flushing, potentially using invlpg for single entry flushing,
using an arch independent function name.

What x86 hardware did you use to figure the optimal number?

Actually I didn't.  I used Alex Shi's numbers.

https://lkml.org/lkml/2012/6/25/39

"Like some machine in my hands, balance points is 16 entries
on Romely-EP; while it is at 8 entries on Bloomfield NHM-EP;
and is 256 on IVB mobile CPU. but on model 15 core2 Xeon
using invlpg has nothing help.

For untested machine, do a conservative optimization, same
as NHM CPU."

--
Seth

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