Re: pgd/pmd/pte and x86 kernel virtual addresses
From: Timur Tabi <hidden>
Date: 2000-08-29 15:31:07
** Reply to message from "Stephen C. Tweedie" [off-list ref] on Tue, 29 Aug 2000 00:09:35 +0100
quoted
physical pointer. The first is the normal virtual pointer for kernel memory, and the second is the one returned by ioremap_nocache(). I was under the understanding that caching is enabled on physical pages only, so it shouldn't matter which virtual address I use. Is that correct?No. The no-cache bit is set in the page table entry, so depends on the virtual address. There is a *different* form of memory access control which can be used to make memory non-cachable, and that is the "mtrr" (Memory Type Range Register), which exists in different forms on all recent Intel and AMD cpus. Mtrrs work on physical addresses, but that is not what ioremap_nocache() uses.
Ok, thanks! That explains a whole lot. Another question: is there a way I can enable Write Combining on a page, without using MTRR's? -- Timur Tabi - ttabi@interactivesi.com Interactive Silicon - http://www.interactivesi.com When replying to a mailing-list message, please don't cc: me, because then I'll just get two copies of the same message. -- To unsubscribe, send a message with 'unsubscribe linux-mm' in the body to majordomo@kvack.org. For more info on Linux MM, see: http://www.linux.eu.org/Linux-MM/