Hi,

On 29 Jun 1998 14:59:37 -0500, ebiederm+eric@npwt.net (Eric
W. Biederman) said:

There are two problems I see.  

1) A DMA controller actively access the same memory the CPU is
accessing could be a problem.  Recall video flicker on old video
cards.

Shouldn't be a problem.

2) More importantly the cpu writes to the _cache_, and the DMA
controller reads from the RAM.  I don't see any consistency garnatees
there.  We may be able solve these problems on a per architecture or
device basis however.

Again, not important.  If we ever modify a page which is already being
written out to a device, then we mark that page dirty.  On write, we
mark it clean (but locked) _before_ starting the IO, not after.  So, if
there is ever an overlap of a filesystem/mmap write with an IO to disk,
we will always schedule another IO later to clean the re-dirtied
buffers.

--Stephen