[PATCH] Make interrupt handler works for all cases

specially when the kernel is mapped.

Signed-off-by: Franck Bui-Huu <redacted>


---

arch/mips/kernel/genex.S |    3 ++-
1 files changed, 2 insertions(+), 1 deletions(-)

72821cd1fc2a6e31e31c2babf338425b29e8f11f

diff --git a/arch/mips/kernel/genex.S b/arch/mips/kernel/genex.S
index ff7af36..50cb0c2 100644
--- a/arch/mips/kernel/genex.S
+++ b/arch/mips/kernel/genex.S

@@ -132,7 +132,8 @@ NESTED(handle_int, PT_SIZE, sp)

	PTR_LA	ra, ret_from_irq
	move	a0, sp
-	j	plat_irq_dispatch
+	PTR_LA	k0, plat_irq_dispatch
+	jr	k0
	END(handle_int)

	__INIT
--
1.3.0.g2473

On Tue, May 02, 2006 at 09:55:51AM +0200, Franck Bui-Huu wrote:

specially when the kernel is mapped.

At which time you're on very fragile ice because TLB instructions should
better be executed from an unmapped address ...

  Ralf

2006/5/2, Ralf Baechle [off-list ref]:

On Tue, May 02, 2006 at 09:55:51AM +0200, Franck Bui-Huu wrote:

quoted

specially when the kernel is mapped.

At which time you're on very fragile ice because TLB instructions should
better be executed from an unmapped address ...

well TLB entry used by the kernel is wired, so it should work fined,
shouldn't it ?

Thanks
--
              Franck

Franck Bui-Huu wrote:

2006/5/2, Ralf Baechle [off-list ref]:

quoted

On Tue, May 02, 2006 at 09:55:51AM +0200, Franck Bui-Huu wrote:

quoted

specially when the kernel is mapped.

At which time you're on very fragile ice because TLB instructions should
better be executed from an unmapped address ...

well TLB entry used by the kernel is wired, so it should work fined,
shouldn't it ?

The architecture spec doesn't guarantee it will.


Thiemo

2006/5/2, Ralf Baechle [off-list ref]:

On Tue, May 02, 2006 at 09:55:51AM +0200, Franck Bui-Huu wrote:

quoted

specially when the kernel is mapped.

At which time you're on very fragile ice because TLB instructions should
better be executed from an unmapped address ...

So does it mean that MIPS arch can't provide reliable support for
running mapped kernel ?

--
              Franck

2006/5/2, Thiemo Seufer [off-list ref]:

Franck Bui-Huu wrote:

quoted

2006/5/2, Ralf Baechle [off-list ref]:

quoted

On Tue, May 02, 2006 at 09:55:51AM +0200, Franck Bui-Huu wrote:

quoted

specially when the kernel is mapped.

At which time you're on very fragile ice because TLB instructions should
better be executed from an unmapped address ...

well TLB entry used by the kernel is wired, so it should work fined,
shouldn't it ?

The architecture spec doesn't guarantee it will.

having a quick look at the TLB handling code, it seems that the code
assumes it will...

--
              Franck

Franck Bui-Huu wrote:

2006/5/2, Thiemo Seufer [off-list ref]:

quoted

Franck Bui-Huu wrote:

quoted

2006/5/2, Ralf Baechle [off-list ref]:

quoted

On Tue, May 02, 2006 at 09:55:51AM +0200, Franck Bui-Huu wrote:

quoted

specially when the kernel is mapped.

At which time you're on very fragile ice because TLB instructions should
better be executed from an unmapped address ...

well TLB entry used by the kernel is wired, so it should work fined,
shouldn't it ?

The architecture spec doesn't guarantee it will.

having a quick look at the TLB handling code, it seems that the code
assumes it will...

I don't know which code you are looking at, but the kernel's TLB
handling doesn't run in mapped space. (The ip27 is an exception,
I assume the R1x000 allows for mapped TLB handling.)


Thiemo

2006/5/2, Thiemo Seufer [off-list ref]:

Franck Bui-Huu wrote:

quoted

2006/5/2, Thiemo Seufer [off-list ref]:

quoted

Franck Bui-Huu wrote:

quoted

2006/5/2, Ralf Baechle [off-list ref]:

quoted

On Tue, May 02, 2006 at 09:55:51AM +0200, Franck Bui-Huu wrote:

quoted

specially when the kernel is mapped.

At which time you're on very fragile ice because TLB instructions should
better be executed from an unmapped address ...

well TLB entry used by the kernel is wired, so it should work fined,
shouldn't it ?

The architecture spec doesn't guarantee it will.

having a quick look at the TLB handling code, it seems that the code
assumes it will...

I don't know which code you are looking at, but the kernel's TLB
handling doesn't run in mapped space. (The ip27 is an exception,
I assume the R1x000 allows for mapped TLB handling.)

I have assumed the same for r4k cpu and it seems to work fine...
Anyways, Ralf can you apply this patch ?

Thanks
--
              Franck