Hi CK,

On Sat, 2021-07-31 at 07:11 +0800, Chun-Kuang Hu wrote:

Hi, Jason:

jason-jh.lin [off-list ref] 於 2021年7月30日 週五 上午1:07寫道：

quoted

Add DSC into mtk_drm_ddp_comp to support for mt8195.

DSC is designed for real-time systems with real-time compression,
transmission, decompression and display.
The DSC standard is a specification of the algorithms used for
compressing and decompressing image display streams, including
the specification of the syntax and semantics of the compressed
video bit stream.

Signed-off-by: jason-jh.lin <redacted>
---
This patch is base on [1]

[1]add mt8195 SoC DRM binding
- 
https://urldefense.com/v3/__https://patchwork.kernel.org/project/linux-mediatek/list/?series=519597__;!!CTRNKA9wMg0ARbw!yW7OLcmG5NUkhK7gDxpSuiBPXTW3QQQ__H78vj20PuPuz37kA6ixuMCBoUy6Wq1ohY03$
 
---
 drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 46
+++++++++++++++++++++
 drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h |  1 +
 drivers/gpu/drm/mediatek/mtk_drm_drv.c      |  2 +
 3 files changed, 49 insertions(+)

diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c

b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
index 75bc00e17fc4..6f4a9b8c9914 100644

--- a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
+++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c

@@ -65,6 +65,12 @@
 #define DITHER_ADD_LSHIFT_G(x)                 (((x) & 0x7) << 4)
 #define DITHER_ADD_RSHIFT_G(x)                 (((x) & 0x7) << 0)

+#define DISP_REG_DSC_CON                       0x0000
+#define DSC_EN                                 BIT(0)
+#define DSC_DUAL_INOUT                         BIT(2)
+#define DSC_BYPASS                             BIT(4)
+#define DSC_UFOE_SEL                           BIT(16)
+
 struct mtk_ddp_comp_dev {
        struct clk *clk;
        void __iomem *regs;

@@ -246,6 +252,35 @@ static void mtk_dither_stop(struct device

*dev)
        writel_relaxed(0x0, priv->regs + DISP_DITHER_EN);
 }

+static void mtk_dsc_config(struct device *dev, unsigned int w,
+                          unsigned int h, unsigned int vrefresh,
+                          unsigned int bpc, struct cmdq_pkt
*cmdq_pkt)
+{
+       struct mtk_ddp_comp_dev *priv = dev_get_drvdata(dev);
+
+       /* dsc bypass mode */
+       mtk_ddp_write_mask(cmdq_pkt, DSC_BYPASS, &priv->cmdq_reg,
priv->regs,
+                          DISP_REG_DSC_CON, DSC_BYPASS);
+       mtk_ddp_write_mask(cmdq_pkt, DSC_UFOE_SEL, &priv->cmdq_reg, 
priv->regs,
+                          DISP_REG_DSC_CON, DSC_UFOE_SEL);
+       mtk_ddp_write_mask(cmdq_pkt, DSC_DUAL_INOUT, &priv-

quoted

cmdq_reg, priv->regs,

+                          DISP_REG_DSC_CON, DSC_DUAL_INOUT);
+}
+
+static void mtk_dsc_start(struct device *dev)
+{
+       struct mtk_ddp_comp_dev *priv = dev_get_drvdata(dev);
+
+       writel_relaxed(DSC_EN, &priv->regs + DISP_REG_DSC_CON);
+}
+
+static void mtk_dsc_stop(struct device *dev)
+{
+       struct mtk_ddp_comp_dev *priv = dev_get_drvdata(dev);
+
+       writel_relaxed(0x0, priv->regs + DISP_REG_DSC_CON);
+}
+
 static const struct mtk_ddp_comp_funcs ddp_aal = {
        .clk_enable = mtk_ddp_clk_enable,
        .clk_disable = mtk_ddp_clk_disable,

@@ -284,6 +319,14 @@ static const struct mtk_ddp_comp_funcs ddp_dpi

= {
        .stop = mtk_dpi_stop,
 };

+static const struct mtk_ddp_comp_funcs ddp_dsc = {
+       .clk_enable = mtk_ddp_clk_enable,
+       .clk_disable = mtk_ddp_clk_disable,
+       .config = mtk_dsc_config,
+       .start = mtk_dsc_start,
+       .stop = mtk_dsc_stop,
+};
+
 static const struct mtk_ddp_comp_funcs ddp_dsi = {
        .start = mtk_dsi_ddp_start,
        .stop = mtk_dsi_ddp_stop,

@@ -356,6 +399,7 @@ static const char * const

mtk_ddp_comp_stem[MTK_DDP_COMP_TYPE_MAX] = {
        [MTK_DISP_MUTEX] = "mutex",
        [MTK_DISP_OD] = "od",
        [MTK_DISP_BLS] = "bls",
+       [MTK_DISP_DSC] = "dsc",

Would you please send a patch to make alphabetic order then apply
this patch?

OK, I'll send that.

quoted

 };

 struct mtk_ddp_comp_match {

@@ -374,6 +418,8 @@ static const struct mtk_ddp_comp_match

mtk_ddp_matches[DDP_COMPONENT_ID_MAX] = {
        [DDP_COMPONENT_DITHER]  = { MTK_DISP_DITHER,    0,
&ddp_dither },
        [DDP_COMPONENT_DPI0]    = { MTK_DPI,            0, &ddp_dpi
},
        [DDP_COMPONENT_DPI1]    = { MTK_DPI,            1, &ddp_dpi
},
+       [DDP_COMPONENT_DSC0]    = { MTK_DISP_DSC,       0, &ddp_dsc
},
+       [DDP_COMPONENT_DSC1]    = { MTK_DISP_DSC,       1, &ddp_dsc
},
        [DDP_COMPONENT_DSI0]    = { MTK_DSI,            0, &ddp_dsi
},
        [DDP_COMPONENT_DSI1]    = { MTK_DSI,            1, &ddp_dsi
},
        [DDP_COMPONENT_DSI2]    = { MTK_DSI,            2, &ddp_dsi
},

diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h

b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h
index bb914d976cf5..661fb620e266 100644

--- a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h
+++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h

@@ -34,6 +34,7 @@ enum mtk_ddp_comp_type {
        MTK_DISP_MUTEX,
        MTK_DISP_OD,
        MTK_DISP_BLS,
+       MTK_DISP_DSC,

Ditto.

quoted

        MTK_DDP_COMP_TYPE_MAX,
 };

diff --git a/drivers/gpu/drm/mediatek/mtk_drm_drv.c

b/drivers/gpu/drm/mediatek/mtk_drm_drv.c
index d6f6d1bdad85..0f6bb4bdc58a 100644

--- a/drivers/gpu/drm/mediatek/mtk_drm_drv.c
+++ b/drivers/gpu/drm/mediatek/mtk_drm_drv.c

@@ -446,6 +446,8 @@ static const struct of_device_id

mtk_ddp_comp_dt_ids[] = {
          .data = (void *)MTK_DISP_GAMMA, },
        { .compatible = "mediatek,mt8183-disp-dither",
          .data = (void *)MTK_DISP_DITHER },
+       { .compatible = "mediatek,mt8195-disp-dsc",
+         .data = (void *)MTK_DISP_DSC },

I would like you move this patch before the patch "add mediatek-drm
of
vdosys0 support for mt8195" and move this part into that patch.

Regards,
Chun-Kuang.

OK, I'll move this part.

Regards,
Jason-JH.Lin

quoted

        { .compatible = "mediatek,mt8173-disp-ufoe",
          .data = (void *)MTK_DISP_UFOE },
        { .compatible = "mediatek,mt2701-dsi",
--
2.18.0

-- 
Jason-JH Lin [off-list ref]
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