Re: [PATCH 2/2] clk: mediatek: fix PWM clock source by adding a fixed-factor clock
From: Stephen Boyd <sboyd@kernel.org>
Date: 2018-03-19 20:25:43
Also in:
linux-arm-kernel, linux-clk, linux-devicetree, lkml, stable
Quoting sean.wang@mediatek.com (2018-02-28 19:27:51)
From: Sean Wang <sean.wang@mediatek.com>
The clock for which all PWM devices on MT7623 or MT2701 actually depending
on has to be divided by four from its parent clock axi_sel in the clock
path prior to PWM devices.
Consequently, adding a fixed-factor clock axisel_d4 as one-fourth of
clock axi_sel allows that PWM devices can have the correct resolution
calculation.
Cc: stable@vger.kernel.org
Fixes: e9862118272a ("clk: mediatek: Add MT2701 clock support")
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
---Applied to clk-next