[PATCH 0/3] enable ISH DMA on EHL platform

These patch set are used for enabling ISH DMA on EHL platform.

During ISH DMA enabling, some platforms (such as EHL) don't
support cache snooping, bus driver (ishtp) has to involve
a new callback, dma_no_cache_snooping(), in hardware layer (ipc)
to get hardware DMA capability.

When do cache flush, clflush_cache_range() API is used on X86
which isn't supported by all other archs (such as ARM).
Considering ISH only exists on Intel platforms, adding ISH
depending on X86 in Kconfig to avoid build warnings or errors
on other archs.

Even Xu (3):
  hid: intel-ish-hid: Set ISH driver depends on x86
  hid: intel-ish-hid: ishtp: Add dma_no_cache_snooping() callback
  hid: intel-ish-hid: ipc: Specify that EHL no cache snooping

 drivers/hid/intel-ish-hid/Kconfig           |  1 +
 drivers/hid/intel-ish-hid/ipc/ipc.c         | 26 +++++++++++++++++++++++++-
 drivers/hid/intel-ish-hid/ishtp/client.c    | 18 ++++++++++++++++++
 drivers/hid/intel-ish-hid/ishtp/ishtp-dev.h |  1 +
 4 files changed, 45 insertions(+), 1 deletion(-)

-- 
2.7.4

Different platforms have different DMA capability, on most of
platforms, DMA support cache snooping. But few platforms,
such as ElkhartLake (EHL), don't support cache snooping
which requires cache flush from driver.

So add a hardware level callback to let ishtp driver know if cache
flush is needed.

As most of platform support cache snooping, so driver will not
do cache flush by default, until platform implements this callback
and return true explicitly.

Acked-by: Pandruvada, Srinivas <redacted>
Signed-off-by: Even Xu <even.xu@intel.com>
---
 drivers/hid/intel-ish-hid/ishtp/client.c    | 18 ++++++++++++++++++
 drivers/hid/intel-ish-hid/ishtp/ishtp-dev.h |  1 +
 2 files changed, 19 insertions(+)

diff --git a/drivers/hid/intel-ish-hid/ishtp/client.c b/drivers/hid/intel-ish-hid/ishtp/client.c
index 1cc1571..be443d6 100644
--- a/drivers/hid/intel-ish-hid/ishtp/client.c
+++ b/drivers/hid/intel-ish-hid/ishtp/client.c

@@ -10,6 +10,7 @@
 #include <linux/wait.h>
 #include <linux/delay.h>
 #include <linux/dma-mapping.h>
+#include <asm/cacheflush.h>
 #include "hbm.h"
 #include "client.h"
 

@@ -773,6 +774,14 @@ static void ishtp_cl_send_msg_dma(struct ishtp_device *dev,
 	/* write msg to dma buf */
 	memcpy(msg_addr, cl_msg->send_buf.data, cl_msg->send_buf.size);
 
+	/*
+	 * if current fw don't support cache snooping, driver have to
+	 * flush the cache manually.
+	 */
+	if (dev->ops->dma_no_cache_snooping &&
+		dev->ops->dma_no_cache_snooping(dev))
+		clflush_cache_range(msg_addr, cl_msg->send_buf.size);
+
 	/* send dma_xfer hbm msg */
 	off = msg_addr - (unsigned char *)dev->ishtp_host_dma_tx_buf;
 	ishtp_hbm_hdr(&hdr, sizeof(struct dma_xfer_hbm));

@@ -997,6 +1006,15 @@ void recv_ishtp_cl_msg_dma(struct ishtp_device *dev, void *msg,
 		}
 
 		buffer = rb->buffer.data;
+
+		/*
+		 * if current fw don't support cache snooping, driver have to
+		 * flush the cache manually.
+		 */
+		if (dev->ops->dma_no_cache_snooping &&
+			dev->ops->dma_no_cache_snooping(dev))
+			clflush_cache_range(msg, hbm->msg_length);
+
 		memcpy(buffer, msg, hbm->msg_length);
 		rb->buf_idx = hbm->msg_length;
 

diff --git a/drivers/hid/intel-ish-hid/ishtp/ishtp-dev.h b/drivers/hid/intel-ish-hid/ishtp/ishtp-dev.h
index 1cc6364..e443dc9 100644
--- a/drivers/hid/intel-ish-hid/ishtp/ishtp-dev.h
+++ b/drivers/hid/intel-ish-hid/ishtp/ishtp-dev.h

@@ -118,6 +118,7 @@ struct ishtp_hw_ops {
 			unsigned long buffer_length);
 	uint32_t	(*get_fw_status)(struct ishtp_device *dev);
 	void	(*sync_fw_clock)(struct ishtp_device *dev);
+	bool	(*dma_no_cache_snooping)(struct ishtp_device *dev);
 };
 
 /**

-- 
2.7.4

During ISH DMA enabling, some platforms (such as EHL) don't
support cache snooping, driver needs involve clflush_cache_range
API which isn't supported by all archs (such as ARM).

Considering ISH only exists on Intel platforms, add the dependence
in Kconfig to avoid build warnings or errors on other archs.

Acked-by: Pandruvada, Srinivas <redacted>
Signed-off-by: Even Xu <even.xu@intel.com>
---
 drivers/hid/intel-ish-hid/Kconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/hid/intel-ish-hid/Kconfig b/drivers/hid/intel-ish-hid/Kconfig
index c6c9cfe2..689da84 100644
--- a/drivers/hid/intel-ish-hid/Kconfig
+++ b/drivers/hid/intel-ish-hid/Kconfig

@@ -5,6 +5,7 @@ menu "Intel ISH HID support"
 config INTEL_ISH_HID
 	tristate "Intel Integrated Sensor Hub"
 	default n
+	depends on X86
 	select HID
 	help
 	  The Integrated Sensor Hub (ISH) enables the ability to offload

-- 
2.7.4

Specify that EHL doesn't support DMA cache snooping.

Acked-by: Pandruvada, Srinivas <redacted>
Signed-off-by: Even Xu <even.xu@intel.com>
---
 drivers/hid/intel-ish-hid/ipc/ipc.c | 26 +++++++++++++++++++++++++-
 1 file changed, 25 insertions(+), 1 deletion(-)

diff --git a/drivers/hid/intel-ish-hid/ipc/ipc.c b/drivers/hid/intel-ish-hid/ipc/ipc.c
index 47bbeb8..89ea2ff 100644
--- a/drivers/hid/intel-ish-hid/ipc/ipc.c
+++ b/drivers/hid/intel-ish-hid/ipc/ipc.c

@@ -889,6 +889,29 @@ static uint32_t ish_ipc_get_header(struct ishtp_device *dev, int length,
 	return drbl_val;
 }
 
+/**
+ * _dma_no_cache_snooping()
+ *
+ * Check on current platform, DMA supports cache snooping or not.
+ * This callback is used to notify uplayer driver if manully cache
+ * flush is needed when do DMA operation.
+ *
+ * Please pay attention to this callback implementation, if declare
+ * having cache snooping on a cache snooping not supported platform
+ * will cause uplayer driver receiving mismatched data; and if
+ * declare no cache snooping on a cache snooping supported platform
+ * will cause cache be flushed twice and performance hit.
+ *
+ * @dev: ishtp device pointer
+ *
+ * Return: false - has cache snooping capability
+ *         true - no cache snooping, need manually cache flush
+ */
+static bool _dma_no_cache_snooping(struct ishtp_device *dev)
+{
+	return dev->pdev->device == EHL_Ax_DEVICE_ID;
+}
+
 static const struct ishtp_hw_ops ish_hw_ops = {
 	.hw_reset = _ish_hw_reset,
 	.ipc_reset = _ish_ipc_reset,

@@ -897,7 +920,8 @@ static const struct ishtp_hw_ops ish_hw_ops = {
 	.write = write_ipc_to_queue,
 	.get_fw_status = _ish_read_fw_sts_reg,
 	.sync_fw_clock = _ish_sync_fw_clock,
-	.ishtp_read_hdr = _ishtp_read_hdr
+	.ishtp_read_hdr = _ishtp_read_hdr,
+	.dma_no_cache_snooping = _dma_no_cache_snooping
 };
 
 /**

-- 
2.7.4

On Thu, 10 Jun 2021, Even Xu wrote:

These patch set are used for enabling ISH DMA on EHL platform.

During ISH DMA enabling, some platforms (such as EHL) don't
support cache snooping, bus driver (ishtp) has to involve
a new callback, dma_no_cache_snooping(), in hardware layer (ipc)
to get hardware DMA capability.

When do cache flush, clflush_cache_range() API is used on X86
which isn't supported by all other archs (such as ARM).
Considering ISH only exists on Intel platforms, adding ISH
depending on X86 in Kconfig to avoid build warnings or errors
on other archs.

Even Xu (3):
  hid: intel-ish-hid: Set ISH driver depends on x86
  hid: intel-ish-hid: ishtp: Add dma_no_cache_snooping() callback
  hid: intel-ish-hid: ipc: Specify that EHL no cache snooping

 drivers/hid/intel-ish-hid/Kconfig           |  1 +
 drivers/hid/intel-ish-hid/ipc/ipc.c         | 26 +++++++++++++++++++++++++-
 drivers/hid/intel-ish-hid/ishtp/client.c    | 18 ++++++++++++++++++
 drivers/hid/intel-ish-hid/ishtp/ishtp-dev.h |  1 +
 4 files changed, 45 insertions(+), 1 deletion(-)

Now queued in for-5.14/intel-ish, thanks.

-- 
Jiri Kosina
SUSE Labs

Got it, Thanks Jiri!

Best Regards,
Even Xu

-----Original Message-----
From: Jiri Kosina <jikos@kernel.org> 
Sent: Monday, June 14, 2021 9:56 PM
To: Xu, Even <even.xu@intel.com>
Cc: srinivas.pandruvada@linux.intel.com; benjamin.tissoires@redhat.com; linux-input@vger.kernel.org
Subject: Re: [PATCH 0/3] enable ISH DMA on EHL platform

On Thu, 10 Jun 2021, Even Xu wrote:

These patch set are used for enabling ISH DMA on EHL platform.

During ISH DMA enabling, some platforms (such as EHL) don't support 
cache snooping, bus driver (ishtp) has to involve a new callback, 
dma_no_cache_snooping(), in hardware layer (ipc) to get hardware DMA 
capability.

When do cache flush, clflush_cache_range() API is used on X86 which 
isn't supported by all other archs (such as ARM).
Considering ISH only exists on Intel platforms, adding ISH depending 
on X86 in Kconfig to avoid build warnings or errors on other archs.

Even Xu (3):
  hid: intel-ish-hid: Set ISH driver depends on x86
  hid: intel-ish-hid: ishtp: Add dma_no_cache_snooping() callback
  hid: intel-ish-hid: ipc: Specify that EHL no cache snooping

 drivers/hid/intel-ish-hid/Kconfig           |  1 +
 drivers/hid/intel-ish-hid/ipc/ipc.c         | 26 +++++++++++++++++++++++++-
 drivers/hid/intel-ish-hid/ishtp/client.c    | 18 ++++++++++++++++++
 drivers/hid/intel-ish-hid/ishtp/ishtp-dev.h |  1 +
 4 files changed, 45 insertions(+), 1 deletion(-)

Now queued in for-5.14/intel-ish, thanks.

--
Jiri Kosina
SUSE Labs