Hi Anirudh,

Some advice below:

2011/3/27 Anirudh Ghayal [off-list ref]:

 why add pr_fmt here?

+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/rtc.h>
+#include <linux/pm.h>
+#include <linux/slab.h>
+#include<linux/spinlock.h>
+
+#include <linux/mfd/pm8xxx/core.h>
+#include <linux/mfd/pm8xxx/rtc.h>
+
+/* RTC Register offsets from RTC CTRL REG */
+#define PM8XXX_ALARM_CTRL_OFFSET 0x01
+#define PM8XXX_RTC_WRITE_OFFSET 0x02
+#define PM8XXX_RTC_READ_OFFSET 0x06
+#define PM8XXX_ALARM_RW_OFFSET 0x0A
+
+/* RTC_CTRL register bit fields */
+#define PM8xxx_RTC_ENABLE      BIT(7)
+#define PM8xxx_RTC_ALARM_ENABLE        BIT(1)
+#define PM8xxx_RTC_ALARM_CLEAR  BIT(0)
+
+#define NUM_8_BIT_RTC_REGS     0x4
+
+/**
+ * struct pm8xxx_rtc - rtc driver internal structure
+ * @rtc: rtc device for this driver
+ * @rtc_alarm_irq: rtc alarm irq number
+ */
+struct pm8xxx_rtc {
+       struct rtc_device *rtc;
+       int rtc_alarm_irq;
+       int rtc_base;
+       int rtc_read_base;
+       int rtc_write_base;
+       int alarm_rw_base;
+       u8  ctrl_reg;
+       struct device *parent;
+       spinlock_t ctrl_reg_lock;
+};
+
+/*
+ * The RTC registers need to be read/written one byte at a time. This is a
+ * hardware limitation.
+ */
+static int pm8xxx_read_wrapper(struct pm8xxx_rtc *rtc_dd, u8 *rtc_val,
+                       int base, int count)
+{
+       int i, rc;
+
+       for (i = 0; i < count; i++) {
+               rc = pm8xxx_readb(rtc_dd->parent, base + i, &rtc_val[i]);
+               if (rc < 0) {
+                       pr_err("PM8xxx read failed\n");

All pr_err are not so good, please try to use dev_err.

+                       return rc;
+               }
+       }
+
+       return 0;
+}
+
+static int pm8xxx_write_wrapper(struct pm8xxx_rtc *rtc_dd, u8 *rtc_val,
+                       int base, int count)
+{
+       int i, rc;
+
+       for (i = 0; i < count; i++) {
+               rc = pm8xxx_writeb(rtc_dd->parent, base + i, rtc_val[i]);
+               if (rc < 0) {
+                       pr_err("PM8xxx write failed\n");
+                       return rc;
+               }
+       }
+
+       return 0;
+}
+
+
+/*
+ * Steps to write the RTC registers.
+ * 1. Disable alarm if enabled.
+ * 2. Write 0x00 to LSB.
+ * 3. Write Byte[1], Byte[2], Byte[3] then Byte[0].
+ * 4. Enable alarm if disabled in step 1.
+ */
+static int
+pm8xxx_rtc_set_time(struct device *dev, struct rtc_time *tm)
+{
+       int rc;
+       unsigned long secs, irq_flags;
+       u8 value[4], reg = 0, alarm_enabled = 0, ctrl_reg;
+       struct pm8xxx_rtc *rtc_dd = dev_get_drvdata(dev);
+
+       rtc_tm_to_time(tm, &secs);
+
+       value[0] = secs & 0xFF;
+       value[1] = (secs >> 8) & 0xFF;
+       value[2] = (secs >> 16) & 0xFF;
+       value[3] = (secs >> 24) & 0xFF;
+
+       dev_dbg(dev, "Seconds value to be written to RTC = %lu\n", secs);
+
+       spin_lock_irqsave(&rtc_dd->ctrl_reg_lock, irq_flags);
+       ctrl_reg = rtc_dd->ctrl_reg;
+
+       if (ctrl_reg & PM8xxx_RTC_ALARM_ENABLE) {
+               alarm_enabled = 1;
+               ctrl_reg &= ~PM8xxx_RTC_ALARM_ENABLE;
+               rc = pm8xxx_write_wrapper(rtc_dd, &ctrl_reg, rtc_dd->rtc_base,
+                                                                       1);
+               if (rc < 0) {
+                       dev_err(dev, "PM8xxx write failed\n");
+                       goto rtc_rw_fail;
+               }
+       } else
+               spin_unlock_irqrestore(&rtc_dd->ctrl_reg_lock, irq_flags);
+
+       /* Write Byte[1], Byte[2], Byte[3], Byte[0] */
+       /* Write 0 to Byte[0] */
+       reg = 0;
+       rc = pm8xxx_write_wrapper(rtc_dd, &reg, rtc_dd->rtc_write_base, 1);
+       if (rc < 0) {
+               dev_err(dev, "PM8xxx write failed\n");
+               goto rtc_rw_fail;
+       }
+
+       /* Write Byte[1], Byte[2], Byte[3] */
+       rc = pm8xxx_write_wrapper(rtc_dd, value + 1,
+                                       rtc_dd->rtc_write_base + 1, 3);
+       if (rc < 0) {
+               dev_err(dev, "Write to RTC registers failed\n");
+               goto rtc_rw_fail;
+       }
+
+       /* Write Byte[0] */
+       rc = pm8xxx_write_wrapper(rtc_dd, value, rtc_dd->rtc_write_base, 1);
+       if (rc < 0) {
+               dev_err(dev, "Write to RTC register failed\n");
+               goto rtc_rw_fail;
+       }
+
+       if (alarm_enabled) {
+               ctrl_reg |= PM8xxx_RTC_ALARM_ENABLE;
+               rc = pm8xxx_write_wrapper(rtc_dd, &ctrl_reg, rtc_dd->rtc_base,
+                                                                       1);
+               if (rc < 0) {
+                       dev_err(dev, "PM8xxx write failed\n");
+                       goto rtc_rw_fail;
+               }
+       }
+
+       rtc_dd->ctrl_reg = ctrl_reg;
+
+rtc_rw_fail:
+       if (alarm_enabled)
+               spin_unlock_irqrestore(&rtc_dd->ctrl_reg_lock, irq_flags);
+
+       return rc;
+}
+
+static int
+pm8xxx_rtc_read_time(struct device *dev, struct rtc_time *tm)
+{
+       int rc;
+       u8 value[4], reg;
+       unsigned long secs;
+       struct pm8xxx_rtc *rtc_dd = dev_get_drvdata(dev);
+
+       rc = pm8xxx_read_wrapper(rtc_dd, value, rtc_dd->rtc_read_base,
+                                                       NUM_8_BIT_RTC_REGS);
+       if (rc < 0) {
+               dev_err(dev, "RTC time read failed\n");
+               return rc;
+       }
+
+       /*
+        * Read the LSB again and check if there has been a carry over.
+        * If there is, redo the read operation.
+        */
+       rc = pm8xxx_read_wrapper(rtc_dd, &reg, rtc_dd->rtc_read_base, 1);
+       if (rc < 0) {
+               dev_err(dev, "PM8xxx read failed\n");
+               return rc;
+       }
+
+       if (unlikely(reg < value[0])) {
+               rc = pm8xxx_read_wrapper(rtc_dd, value,
+                               rtc_dd->rtc_read_base, NUM_8_BIT_RTC_REGS);
+               if (rc < 0) {
+                       dev_err(dev, "RTC time read failed\n");
+                       return rc;
+               }
+       }
+
+       secs = value[0] | (value[1] << 8) | (value[2] << 16) \
+                                               | (value[3] << 24);
+
+       rtc_time_to_tm(secs, tm);
+
+       rc = rtc_valid_tm(tm);
+       if (rc < 0) {
+               dev_err(dev, "Invalid time read from PM8xxx\n");
+               return rc;
+       }
+
+       dev_dbg(dev, "secs = %lu, h:m:s == %d:%d:%d, d/m/y = %d/%d/%d\n",
+                       secs, tm->tm_hour, tm->tm_min, tm->tm_sec,
+                       tm->tm_mday, tm->tm_mon, tm->tm_year);
+
+       return 0;
+}
+
+static int
+pm8xxx_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alarm)
+{
+       int rc;
+       u8 value[4], ctrl_reg;
+       unsigned long secs, secs_rtc, irq_flags;
+       struct pm8xxx_rtc *rtc_dd = dev_get_drvdata(dev);
+       struct rtc_time rtc_tm;
+
+       rtc_tm_to_time(&alarm->time, &secs);
+
+       /*
+        * Read the current RTC time and verify if the alarm time is in the
+        * past. If yes, return invalid.
+        */
+       rc = pm8xxx_rtc_read_time(dev, &rtc_tm);
+       if (rc < 0) {
+               dev_err(dev, "Unamble to read RTC time\n");
+               return -EINVAL;
+       }
+
+       rtc_tm_to_time(&rtc_tm, &secs_rtc);
+       if (secs < secs_rtc) {
+               dev_err(dev, "Trying to set alarm in the past\n");
+               return -EINVAL;
+       }
+
+       value[0] = secs & 0xFF;
+       value[1] = (secs >> 8) & 0xFF;
+       value[2] = (secs >> 16) & 0xFF;
+       value[3] = (secs >> 24) & 0xFF;
+
+       spin_lock_irqsave(&rtc_dd->ctrl_reg_lock, irq_flags);
+
+       rc = pm8xxx_write_wrapper(rtc_dd, value, rtc_dd->alarm_rw_base,
+                                                       NUM_8_BIT_RTC_REGS);
+       if (rc < 0) {
+               dev_err(dev, "Write to RTC ALARM registers failed\n");
+               goto rtc_rw_fail;
+       }
+
+       ctrl_reg = rtc_dd->ctrl_reg;
+       ctrl_reg = (alarm->enabled) ? (ctrl_reg | PM8xxx_RTC_ALARM_ENABLE) :
+                                       (ctrl_reg & ~PM8xxx_RTC_ALARM_ENABLE);
+
+       rc = pm8xxx_write_wrapper(rtc_dd, &ctrl_reg, rtc_dd->rtc_base, 1);
+       if (rc < 0) {
+               dev_err(dev, "PM8xxx write failed\n");
+               goto rtc_rw_fail;
+       }
+
+       rtc_dd->ctrl_reg = ctrl_reg;
+
+       dev_dbg(dev, "Alarm Set for h:r:s=%d:%d:%d, d/m/y=%d/%d/%d\n",
+                       alarm->time.tm_hour, alarm->time.tm_min,
+                       alarm->time.tm_sec, alarm->time.tm_mday,
+                       alarm->time.tm_mon, alarm->time.tm_year);
+rtc_rw_fail:
+       spin_unlock_irqrestore(&rtc_dd->ctrl_reg_lock, irq_flags);
+       return rc;
+}
+
+static int
+pm8xxx_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alarm)
+{
+       int rc;
+       u8 value[4];
+       unsigned long secs;
+       struct pm8xxx_rtc *rtc_dd = dev_get_drvdata(dev);
+
+       rc = pm8xxx_read_wrapper(rtc_dd, value, rtc_dd->alarm_rw_base,
+                       NUM_8_BIT_RTC_REGS);
+       if (rc < 0) {
+               dev_err(dev, "RTC alarm time read failed\n");
+               return rc;
+       }
+
+       secs = value[0] | (value[1] << 8) | (value[2] << 16) | \
+                                                (value[3] << 24);
+
+       rtc_time_to_tm(secs, &alarm->time);
+
+       rc = rtc_valid_tm(&alarm->time);
+       if (rc < 0) {
+               dev_err(dev, "Invalid time read from PM8xxx\n");
+               return rc;
+       }
+
+       dev_dbg(dev, "Alarm set for - h:r:s=%d:%d:%d, d/m/y=%d/%d/%d\n",
+               alarm->time.tm_hour, alarm->time.tm_min,
+                               alarm->time.tm_sec, alarm->time.tm_mday,
+                               alarm->time.tm_mon, alarm->time.tm_year);
+
+       return 0;
+}
+
+
+static int
+pm8xxx_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
+{
+       int rc;
+       unsigned long irq_flags;
+       struct pm8xxx_rtc *rtc_dd = dev_get_drvdata(dev);
+       u8 ctrl_reg;
+
+       spin_lock_irqsave(&rtc_dd->ctrl_reg_lock, irq_flags);
+       ctrl_reg = rtc_dd->ctrl_reg;
+       ctrl_reg = (enabled) ? (ctrl_reg | PM8xxx_RTC_ALARM_ENABLE) :
+                               (ctrl_reg & ~PM8xxx_RTC_ALARM_ENABLE);
+
+       rc = pm8xxx_write_wrapper(rtc_dd, &ctrl_reg, rtc_dd->rtc_base, 1);
+       if (rc < 0) {
+               dev_err(dev, "PM8xxx write failed\n");
+               goto rtc_rw_fail;
+       }
+
+       rtc_dd->ctrl_reg = ctrl_reg;
+
+rtc_rw_fail:
+       spin_unlock_irqrestore(&rtc_dd->ctrl_reg_lock, irq_flags);
+       return rc;
+}
+
+static struct rtc_class_ops pm8xxx_rtc_ops = {
+       .read_time      = pm8xxx_rtc_read_time,
+       .set_alarm      = pm8xxx_rtc_set_alarm,
+       .read_alarm     = pm8xxx_rtc_read_alarm,
+       .alarm_irq_enable = pm8xxx_rtc_alarm_irq_enable,
+};
+
+static irqreturn_t pm8xxx_alarm_trigger(int irq, void *dev_id)
+{
+       struct pm8xxx_rtc *rtc_dd = dev_id;
+       u8 ctrl_reg;
+       int rc;
+       unsigned long irq_flags;
+
+       rtc_update_irq(rtc_dd->rtc, 1, RTC_IRQF | RTC_AF);
+
+       spin_lock_irqsave(&rtc_dd->ctrl_reg_lock, irq_flags);
+
+       /* Clear the alarm enable bit */
+       ctrl_reg = rtc_dd->ctrl_reg;
+       ctrl_reg &= ~PM8xxx_RTC_ALARM_ENABLE;
+
+       rc = pm8xxx_write_wrapper(rtc_dd, &ctrl_reg, rtc_dd->rtc_base, 1);
+       if (rc < 0) {
+               spin_unlock_irqrestore(&rtc_dd->ctrl_reg_lock, irq_flags);
+               pr_err("PM8xxx write failed!\n");
+               goto rtc_alarm_handled;
+       }
+
+       rtc_dd->ctrl_reg = ctrl_reg;
+       spin_unlock_irqrestore(&rtc_dd->ctrl_reg_lock, irq_flags);
+
+       /* Clear RTC alarm register */
+       rc = pm8xxx_read_wrapper(rtc_dd, &ctrl_reg, rtc_dd->rtc_base +
+                                               PM8XXX_ALARM_CTRL_OFFSET, 1);
+       if (rc < 0) {
+               pr_err("PM8xxx write failed!\n");
+               goto rtc_alarm_handled;
+       }
+
+       ctrl_reg &= ~PM8xxx_RTC_ALARM_CLEAR;
+       rc = pm8xxx_write_wrapper(rtc_dd, &ctrl_reg, rtc_dd->rtc_base +
+                                               PM8XXX_ALARM_CTRL_OFFSET, 1);
+       if (rc < 0)
+               pr_err("PM8xxx write failed!\n");
+
+rtc_alarm_handled:
+       return IRQ_HANDLED;
+}
+
+static int __devinit pm8xxx_rtc_probe(struct platform_device *pdev)
+{
+       int rc;
+       u8 ctrl_reg;
+       bool rtc_write_enable = false;
+       struct pm8xxx_rtc *rtc_dd;
+       struct resource *rtc_resource;
+       const struct pm8xxx_rtc_platform_data *pdata =
+               pdev->dev.platform_data;
+
+       if (pdata != NULL)
+               rtc_write_enable = pdata->rtc_write_enable;
+
+       rtc_dd = kzalloc(sizeof(*rtc_dd), GFP_KERNEL);
+       if (rtc_dd == NULL) {
+               dev_err(&pdev->dev, "Unable to allocate memory!\n");
+               return -ENOMEM;
+       }
+
+       /* Initialise spinlock to protect RTC cntrol register */
+       spin_lock_init(&rtc_dd->ctrl_reg_lock);
+
+       rtc_dd->rtc_alarm_irq = platform_get_irq(pdev, 0);
+       if (!rtc_dd->rtc_alarm_irq) {
+               dev_err(&pdev->dev, "Alarm IRQ resource absent!\n");
+               rc = -ENXIO;
+               goto fail_rtc_enable;
+       }
+

In fact, the 'platform_get_irq' maybe return -ENXIO, so you should use
the 'if (rtc_dd->rtc_alarm_irq < 0)' instead of  '!' to judge
the get irq action.

+       rtc_resource = platform_get_resource_byname(pdev, IORESOURCE_IO,
+                                                       "pmic_rtc_base");
+       if (rtc_resource)
+               rtc_dd->rtc_base = rtc_resource->start;
+       if (!rtc_dd->rtc_base) {
+               dev_err(&pdev->dev, "RTC IO resource absent!\n");
+               rc = -ENXIO;
+               goto fail_rtc_enable;
+       }

      rtc_resource = platform_get_resource_byname(pdev, IORESOURCE_IO,
                                                       "pmic_rtc_base");
       if !(rtc_resource && rtc_resource->start) {
               dev_err(&pdev->dev, "RTC IO resource absent!\n");
               rc = -ENXIO;
               goto fail_rtc_enable;
       }
     rtc_dd->rtc_base = rtc_resource->start;

Do you think above code style is better?

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