On Thursday 16 July 2009, Alessandro Rubini wrote:

quoted

Note that this issue is unrelated to full duplex DMA support.

Yes, that's right. But full duplex is not involved here, it's
just 2 or 3 rounds of "one byte tx then two bytes rx".

Then your patch description was *seriously* misleading:

quoted

quoted

Since the SPI master might use DMA, tx and rx buffers must live on
different cache lines. ...

I'll have another look at that patch to see if it could make
sense after I discard the description.

- dave