Thread (5 messages) 5 messages, 3 authors, 2011-09-14

Re: [RFC PATCH #upstream-fixes] libata: don't use 32bit PIO for small transfers

From: Ming Lei <tom.leiming@gmail.com>
Date: 2011-09-14 07:44:45
Subsystem: libata subsystem (serial and parallel ata drivers), the rest · Maintainers: Damien Le Moal, Niklas Cassel, Linus Torvalds

Hi Tejun and Alan,

Thanks for your spending time on the bug.

On Tue, Sep 6, 2011 at 5:49 PM, Alan Cox [off-list ref] wrote:
So NACK.

Add a piix_sata_data_xfer32_maybe() function to the ata_piix driver
specifically for this chipset.
Could you accept the quirk patch below to make these controllers working
at least now?
diff --git a/drivers/ata/ata_piix.c b/drivers/ata/ata_piix.c
index 43107e9..eb7ea56 100644
--- a/drivers/ata/ata_piix.c
+++ b/drivers/ata/ata_piix.c
@@ -341,11 +341,12 @@ static struct ata_port_operations piix_sata_ops = {
 };

 static struct ata_port_operations piix_pata_ops = {
-	.inherits		= &piix_sata_ops,
+	.inherits		= &ata_bmdma32_port_ops,
 	.cable_detect		= ata_cable_40wire,
 	.set_piomode		= piix_set_piomode,
 	.set_dmamode		= piix_set_dmamode,
 	.prereset		= piix_pata_prereset,
+	.sff_irq_check		= piix_irq_check,
 };

 static struct ata_port_operations piix_vmw_ops = {
@@ -1585,6 +1586,15 @@ static int __devinit piix_init_one(struct pci_dev *pdev,
 				"on poweroff and hibernation\n");
 	}

+	/*
+	 * Sandybridge chipset H61/P67/H67 have broken 32 mode up to now
+	 * see https://bugzilla.kernel.org/show_bug.cgi?id=40592
+	 */
+	if (pdev->vendor == PCI_VENDOR_ID_INTEL && pdev->device == 0x1c00)
+		piix_sata_ops.inherits = &ata_bmdma_port_ops;
+	else
+		piix_sata_ops.inherits = &ata_bmdma32_port_ops;
+
 	port_info[0] = piix_port_info[ent->driver_data];
 	port_info[1] = piix_port_info[ent->driver_data];


thanks,
-- 
Ming Lei
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