Since we have generic definitions for bus frequencies, let's use them.

Cc: Wolfram Sang <redacted>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Khalil Blaiech <kblaiech@nvidia.com>
---
v2: added tag (Khalil), converted one missed place in DesignWare driver
 drivers/i2c/busses/i2c-designware-master.c |  2 +-
 drivers/i2c/busses/i2c-mlxbf.c             | 14 ++++----------
 drivers/i2c/busses/i2c-qcom-cci.c          |  4 ++--
 3 files changed, 7 insertions(+), 13 deletions(-)

diff --git a/drivers/i2c/busses/i2c-designware-master.c b/drivers/i2c/busses/i2c-designware-master.c
index dd27b9dbe931..3f4d2124e0fc 100644
--- a/drivers/i2c/busses/i2c-designware-master.c
+++ b/drivers/i2c/busses/i2c-designware-master.c

@@ -78,7 +78,7 @@ static int i2c_dw_set_timings_master(struct dw_i2c_dev *dev)
         * difference is the timing parameter values since the registers are
         * the same.
         */
-       if (t->bus_freq_hz == 1000000) {
+       if (t->bus_freq_hz == I2C_MAX_FAST_MODE_PLUS_FREQ) {
                /*
                 * Check are Fast Mode Plus parameters available. Calculate
                 * SCL timing parameters for Fast Mode Plus if not set.

diff --git a/drivers/i2c/busses/i2c-mlxbf.c b/drivers/i2c/busses/i2c-mlxbf.c
index 2fb0532d8a16..80ab831df349 100644
--- a/drivers/i2c/busses/i2c-mlxbf.c
+++ b/drivers/i2c/busses/i2c-mlxbf.c

@@ -172,12 +172,6 @@
 #define MLXBF_I2C_SMBUS_THIGH_MAX_TBUF            0x14
 #define MLXBF_I2C_SMBUS_SCL_LOW_TIMEOUT           0x18

-enum {
-       MLXBF_I2C_TIMING_100KHZ = 100000,
-       MLXBF_I2C_TIMING_400KHZ = 400000,
-       MLXBF_I2C_TIMING_1000KHZ = 1000000,
-};
-
 /*
  * Defines SMBus operating frequency and core clock frequency.
  * According to ADB files, default values are compliant to 100KHz SMBus

@@ -1202,7 +1196,7 @@ static int mlxbf_i2c_init_timings(struct platform_device *pdev,

        ret = device_property_read_u32(dev, "clock-frequency", &config_khz);
        if (ret < 0)
-               config_khz = MLXBF_I2C_TIMING_100KHZ;
+               config_khz = I2C_MAX_STANDARD_MODE_FREQ;

        switch (config_khz) {
        default:

@@ -1210,15 +1204,15 @@ static int mlxbf_i2c_init_timings(struct platform_device *pdev,
                pr_warn("Illegal value %d: defaulting to 100 KHz\n",
                        config_khz);
                fallthrough;
-       case MLXBF_I2C_TIMING_100KHZ:
+       case I2C_MAX_STANDARD_MODE_FREQ:
                config_idx = MLXBF_I2C_TIMING_CONFIG_100KHZ;
                break;

-       case MLXBF_I2C_TIMING_400KHZ:
+       case I2C_MAX_FAST_MODE_FREQ:
                config_idx = MLXBF_I2C_TIMING_CONFIG_400KHZ;
                break;

-       case MLXBF_I2C_TIMING_1000KHZ:
+       case I2C_MAX_FAST_MODE_PLUS_FREQ:
                config_idx = MLXBF_I2C_TIMING_CONFIG_1000KHZ;
                break;
        }

diff --git a/drivers/i2c/busses/i2c-qcom-cci.c b/drivers/i2c/busses/i2c-qcom-cci.c
index 1c259b5188de..c63d5545fc2a 100644
--- a/drivers/i2c/busses/i2c-qcom-cci.c
+++ b/drivers/i2c/busses/i2c-qcom-cci.c

@@ -569,9 +569,9 @@ static int cci_probe(struct platform_device *pdev)
                cci->master[idx].mode = I2C_MODE_STANDARD;
                ret = of_property_read_u32(child, "clock-frequency", &val);
                if (!ret) {
-                       if (val == 400000)
+                       if (val == I2C_MAX_FAST_MODE_FREQ)
                                cci->master[idx].mode = I2C_MODE_FAST;
-                       else if (val == 1000000)
+                       else if (val == I2C_MAX_FAST_MODE_PLUS_FREQ)
                                cci->master[idx].mode = I2C_MODE_FAST_PLUS;
                }

--

2.30.2