Re: [PATCH v4 2/2] pinctrl: qcom: Add MSM8952 tlmm pinctrl driver

On 9/7/26 4:19 PM, Muzaffer Kadir wrote:

On Mon, 7 Sep 2026 15:39:18 +0200, Konrad Dybcio wrote:

quoted

On 9/7/26 3:32 PM, Muzaffer Kadir wrote:

quoted

Hi Konrad,

On Mon, 7 Sep 2026 14:04:59 +0200, Konrad Dybcio wrote:

quoted

On 04-Sep-26 14:55, Muzaffer Kadir via B4 Relay wrote:
I told the robot to take a look again (and again and again
a couple more times until it stopped complaining)..

The following feedback is meaningful:

Hi Muzaffer,

  `qdss_tracedata_b_groups` advertises GPIOs that cannot actually select
  the function. Please populate the corresponding PINGROUP slots:

    GPIO8:  mux 11
    GPIO9:  mux 12
    GPIO12: mux 12
    GPIO13: mux 12

I will add these to their pins by sending v5.

But also I want to ask,
does atest_combodac_to_gpio_native
have any mux on gpio12/13/20/21/29/30 ?Or are they wrongly set ?

Yes they do, the robot pointed that out too but I figured it pulled it
from the internal data and not from the existing driver. They don't
really have much of a use outside validation testing I believe, but
since they're there already:

pin	func_idx
12	14
13	14
20	11
21	11
29	10
30	11

Hi Konrad,
I noticed that I forgot to say pin 41 (Sorry about that).

pin 41 func 10

Could you provide it too?

Also can I add mpm pins as a seperate commit in v5?

It would be best to keep it in the same commit since it's part of
the driver

The robot suggests the following:

  static const struct msm_gpio_wakeirq_map msm8952_mpm_map[] = {
        { 1, 4 }, { 5, 5 }, { 9, 6 }, { 12, 21 }, { 13, 10 }, { 17, 12 },
        { 21, 13 }, { 25, 20 }, { 28, 18 }, { 31, 16 }, { 34, 15 }, { 35, 11 },
        { 36, 9 }, { 37, 8 }, { 38, 3 }, { 42, 19 }, { 43, 22 }, { 44, 23 },
        { 45, 24 }, { 46, 25 }, { 48, 26 }, { 54, 14 }, { 58, 17 }, { 62, 53 },
        { 63, 30 }, { 65, 27 }, { 67, 50 }, { 70, 31 }, { 71, 32 }, { 72, 33 },
        { 73, 51 }, { 74, 52 }, { 81, 34 }, { 85, 35 }, { 90, 36 }, { 93, 28 },
        { 97, 29 },
  };

Konrad