Re: [PATCH v3 09/16] reset: starfive-jh7100: Add StarFive JH7100 reset driver
From: Emil Renner Berthing <kernel@esmil.dk>
Date: 2021-11-09 09:28:33
Also in:
linux-clk, linux-devicetree, linux-riscv, linux-serial, lkml
On Mon, 8 Nov 2021 at 10:18, Andy Shevchenko [off-list ref] wrote:
On Thu, Nov 04, 2021 at 01:15:46PM +0100, Emil Renner Berthing wrote:quoted
On Tue, 2 Nov 2021 at 22:17, Emil Renner Berthing [off-list ref] wrote:...quoted
I'd really like to understand your reasoning here. As far as I can tell reading 2 adjacent 32bit registers with a 64bit read as you're proposing is exactly what would cause endian issues. Eg. on little endian you'd get reg0 | reg1 << 32 whereas on big-endian you'd get reg0 << 32 | reg1.Nope, it won't. The endianess is a property of both CPU and device. The I/O accessors, such as readl()/writel() and iowrtieXX()/ioreadXX() are _always_ LE.
Aha! Thanks, that's the bit I was missing.