[PATCH v3 7/7] gpiod: ep93xx: refactor base IRQ number
From: Nikita Shubin <nikita.shubin@maquefel.me>
Date: 2021-01-28 12:25:42
Also in:
lkml
Subsystem:
gpio subsystem, the rest · Maintainers:
Linus Walleij, Bartosz Golaszewski, Linus Torvalds
- use predefined constants instead of plain numbers - use provided bank IRQ number instead of defined constant for port F Signed-off-by: Nikita Shubin <nikita.shubin@maquefel.me> --- drivers/gpio/gpio-ep93xx.c | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-)
diff --git a/drivers/gpio/gpio-ep93xx.c b/drivers/gpio/gpio-ep93xx.c
index df55aa13bd9a..b1501607e8ed 100644
--- a/drivers/gpio/gpio-ep93xx.c
+++ b/drivers/gpio/gpio-ep93xx.c@@ -28,6 +28,8 @@ /* Maximum value for irq capable line identifiers */ #define EP93XX_GPIO_LINE_MAX_IRQ 23 +#define EP93XX_GPIO_A_IRQ_BASE 64 +#define EP93XX_GPIO_B_IRQ_BASE 72 /* * Static mapping of GPIO bank F IRQS: * F0..F7 (16..24) to irq 80..87.
@@ -311,14 +313,14 @@ struct ep93xx_gpio_bank { static struct ep93xx_gpio_bank ep93xx_gpio_banks[] = { /* Bank A has 8 IRQs */ - EP93XX_GPIO_BANK("A", 0x00, 0x10, 0, true, false, 64), + EP93XX_GPIO_BANK("A", 0x00, 0x10, 0, true, false, EP93XX_GPIO_A_IRQ_BASE), /* Bank B has 8 IRQs */ - EP93XX_GPIO_BANK("B", 0x04, 0x14, 8, true, false, 72), + EP93XX_GPIO_BANK("B", 0x04, 0x14, 8, true, false, EP93XX_GPIO_B_IRQ_BASE), EP93XX_GPIO_BANK("C", 0x08, 0x18, 40, false, false, 0), EP93XX_GPIO_BANK("D", 0x0c, 0x1c, 24, false, false, 0), EP93XX_GPIO_BANK("E", 0x20, 0x24, 32, false, false, 0), /* Bank F has 8 IRQs */ - EP93XX_GPIO_BANK("F", 0x30, 0x34, 16, false, true, 0), + EP93XX_GPIO_BANK("F", 0x30, 0x34, 16, false, true, EP93XX_GPIO_F_IRQ_BASE), EP93XX_GPIO_BANK("G", 0x38, 0x3c, 48, false, false, 0), EP93XX_GPIO_BANK("H", 0x40, 0x44, 56, false, false, 0), };
@@ -414,7 +416,7 @@ static int ep93xx_gpio_add_bank(struct gpio_chip *gc, /* Pick resources 1..8 for these IRQs */ for (i = 0; i < girq->num_parents; i++) { girq->parents[i] = platform_get_irq(pdev, i + 1); - gpio_irq = EP93XX_GPIO_F_IRQ_BASE + i; + gpio_irq = bank->irq_base + i; irq_set_chip_data(gpio_irq, &epg->gc[5]); irq_set_chip_and_handler(gpio_irq, &ep93xx_gpio_irq_chip,
@@ -423,7 +425,7 @@ static int ep93xx_gpio_add_bank(struct gpio_chip *gc, } girq->default_type = IRQ_TYPE_NONE; girq->handler = handle_level_irq; - girq->first = EP93XX_GPIO_F_IRQ_BASE; + girq->first = bank->irq_base; } return devm_gpiochip_add_data(dev, gc, epg);
--
2.29.2