On Fri, Jul 28, 2017 at 1:41 PM, Yoshihiro Kaneko [off-list ref] wrote:

From: Takeshi Kihara <redacted>

This patch renames the pin function macro definitions of the GPSR1 and
IPSR4 registers value for the CS1# pin.

This is a correction because GPSR and IPSR register specification for
R8A7795 ES2.0 SoC was changed in R-Car Gen3 Hardware User's Manual
Rev.0.54E.

Signed-off-by: Takeshi Kihara <redacted>
Signed-off-by: Yoshihiro Kaneko <redacted>

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>

i.e. will queue in sh-pfc-for-v4.14.

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds