Re: [PATCH 2/2] gpio: mvebu: fix gpio bank registration when pwm is used
From: Gregory CLEMENT <hidden>
Date: 2017-05-30 13:17:13
Also in:
linux-arm-kernel, linux-pwm, lkml
Hi Richard, On mar., mai 30 2017, Richard Genoud [off-list ref] wrote:
quoted hunk
If more than one gpio bank has the "pwm" property, only one will be registered successfully, all the others will fail with: mvebu-gpio: probe of f1018140.gpio failed with error -17 That's because in alloc_pwms(), the chip->base (aka "int pwm"), was not set (thus, ==0) ; and 0 is a meaningful start value in alloc_pwm(). What was intended is chip->base = -1. Like that, the numbering will be done auto-magically Tested on clearfog-pro (Marvell 88F6828) Signed-off-by: Richard Genoud <redacted> --- drivers/gpio/gpio-mvebu.c | 1 + 1 file changed, 1 insertion(+)diff --git a/drivers/gpio/gpio-mvebu.c b/drivers/gpio/gpio-mvebu.c index cdef2c78cb3b..4734923e11fd 100644 --- a/drivers/gpio/gpio-mvebu.c +++ b/drivers/gpio/gpio-mvebu.c@@ -768,6 +768,7 @@ static int mvebu_pwm_probe(struct platform_device *pdev, mvpwm->chip.dev = dev; mvpwm->chip.ops = &mvebu_pwm_ops; mvpwm->chip.npwm = mvchip->chip.ngpio; + mvpwm->chip.base = -1;
Why not using
mvpwm->chip.base = id * MVEBU_MAX_GPIO_PER_BANK;
as it is done in the mvebu_gpio_probe() function?
I think that if you use base = -1, then the number start from (512 -
number of pin already use). So starting from a low number for one
compatible and a high number for an other compatible could be confusing.
Besides that I agree that mvpwm->chip.base must be initialized and here
again for adding mor context to this patch, we could add:
Fixes: 757642f9a584 ("gpio: mvebu: Add limited PWM support")
Gregory
spin_lock_init(&mvpwm->lock);
-- Gregory Clement, Free Electrons Kernel, drivers, real-time and embedded Linux development, consulting, training and support. http://free-electrons.com