On Sat, Nov 28, 2015 at 10:37 PM, Robert Jarzmik [off-list ref] wrote:

The pxa gpio IP is provided by one chip, which holds multiple banks.

Another reason the driver should register only one gpiochip instead of
multiple gpiochips (ie. 1 per each bank) is that for pincontrol and
devicetree integration (think gpio-ranges), it's impossible to have the
contiguous pin range 0..127 mapped to gpios 0..127.

This patch, amongst other thinks, paves the path to loosen the bond with
the global structure variable pxa_gpio_chip.

Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>

Patch applied.

Since noone else seems to care, would you consider sending a patch
to MAINTAINERS listing yourself as maintainer of this GPIO driver?

Yours,
Linus Walleij