[PATCH 06/13] ARM: omap2: remove omap24xx support

@@ -19874,7 +19874,6 @@ M:	Jarkko Nikula <jarkko.nikula@bitmer.com>
 L:	linux-sound@vger.kernel.org
 L:	linux-omap@vger.kernel.org
 S:	Maintained
-F:	sound/soc/ti/n810.c
 F:	sound/soc/ti/omap*
 F:	sound/soc/ti/rx51.c
 F:	sound/soc/ti/sdma-pcm.*

@@ -20027,7 +20026,6 @@ F:	drivers/gpio/gpio-tps65219.c
 F:	drivers/i2c/busses/i2c-omap.c
 F:	drivers/irqchip/irq-omap-intc.c
 F:	drivers/mfd/*omap*.c
-F:	drivers/mfd/menelaus.c
 F:	drivers/mfd/palmas.c
 F:	drivers/mfd/tps65217.c
 F:	drivers/mfd/tps65218.c

@@ -1,10 +1,4 @@
 # SPDX-License-Identifier: GPL-2.0
-dtb-$(CONFIG_ARCH_OMAP2) += \
-	omap2420-h4.dtb \
-	omap2420-n800.dtb \
-	omap2420-n810.dtb \
-	omap2420-n810-wimax.dtb \
-	omap2430-sdp.dtb
 dtb-$(CONFIG_ARCH_OMAP3) += \
 	am3517-craneboard.dtb \
 	am3517-evm.dtb \

@@ -1,338 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * Device Tree Source for OMAP2 SoC
- *
- * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/
- */
-
-#include <dt-bindings/bus/ti-sysc.h>
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/interrupt-controller/irq.h>
-#include <dt-bindings/pinctrl/omap.h>
-
-/ {
-	compatible = "ti,omap2430", "ti,omap2420", "ti,omap2";
-	interrupt-parent = <&intc>;
-	#address-cells = <1>;
-	#size-cells = <1>;
-	chosen { };
-
-	aliases {
-		serial0 = &uart1;
-		serial1 = &uart2;
-		serial2 = &uart3;
-		i2c0 = &i2c1;
-		i2c1 = &i2c2;
-	};
-
-	cpus {
-		#address-cells = <0>;
-		#size-cells = <0>;
-
-		cpu {
-			compatible = "arm,arm1136jf-s";
-			device_type = "cpu";
-		};
-	};
-
-	pmu {
-		compatible = "arm,arm1136-pmu";
-		interrupts = <3>;
-	};
-
-	soc {
-		compatible = "ti,omap-infra";
-		mpu {
-			compatible = "ti,omap2-mpu";
-			ti,hwmods = "mpu";
-		};
-	};
-
-	ocp {
-		compatible = "simple-bus";
-		#address-cells = <1>;
-		#size-cells = <1>;
-		ranges;
-		ti,hwmods = "l3_main";
-
-		aes: aes@480a6000 {
-			compatible = "ti,omap2-aes";
-			ti,hwmods = "aes";
-			reg = <0x480a6000 0x50>;
-			dmas = <&sdma 9 &sdma 10>;
-			dma-names = "tx", "rx";
-		};
-
-		hdq1w: 1w@480b2000 {
-			compatible = "ti,omap2420-1w";
-			ti,hwmods = "hdq1w";
-			reg = <0x480b2000 0x1000>;
-			interrupts = <58>;
-		};
-
-		intc: interrupt-controller@1 {
-			compatible = "ti,omap2-intc";
-			interrupt-controller;
-			#interrupt-cells = <1>;
-			reg = <0x480FE000 0x1000>;
-		};
-
-		target-module@48056000 {
-			compatible = "ti,sysc-omap2", "ti,sysc";
-			reg = <0x48056000 0x4>,
-			      <0x4805602c 0x4>,
-			      <0x48056028 0x4>;
-			reg-names = "rev", "sysc", "syss";
-			ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
-					 SYSC_OMAP2_EMUFREE |
-					 SYSC_OMAP2_SOFTRESET |
-					 SYSC_OMAP2_AUTOIDLE)>;
-			ti,sysc-midle = <SYSC_IDLE_FORCE>,
-					<SYSC_IDLE_NO>,
-					<SYSC_IDLE_SMART>;
-			ti,syss-mask = <1>;
-			clocks = <&core_l3_ck>;
-			clock-names = "fck";
-			#address-cells = <1>;
-			#size-cells = <1>;
-			ranges = <0 0x48056000 0x1000>;
-
-			sdma: dma-controller@0 {
-				compatible = "ti,omap2420-sdma", "ti,omap-sdma";
-				reg = <0 0x1000>;
-				interrupts = <12>,
-					     <13>,
-					     <14>,
-					     <15>;
-				#dma-cells = <1>;
-				dma-channels = <32>;
-				dma-requests = <64>;
-			};
-		};
-
-		i2c1: i2c@48070000 {
-			compatible = "ti,omap2-i2c";
-			ti,hwmods = "i2c1";
-			reg = <0x48070000 0x80>;
-			#address-cells = <1>;
-			#size-cells = <0>;
-			interrupts = <56>;
-		};
-
-		i2c2: i2c@48072000 {
-			compatible = "ti,omap2-i2c";
-			ti,hwmods = "i2c2";
-			reg = <0x48072000 0x80>;
-			#address-cells = <1>;
-			#size-cells = <0>;
-			interrupts = <57>;
-		};
-
-		mcspi1: spi@48098000 {
-			#address-cells = <1>;
-			#size-cells = <0>;
-			compatible = "ti,omap2-mcspi";
-			ti,hwmods = "mcspi1";
-			reg = <0x48098000 0x100>;
-			interrupts = <65>;
-			dmas = <&sdma 35 &sdma 36 &sdma 37 &sdma 38
-				&sdma 39 &sdma 40 &sdma 41 &sdma 42>;
-			dma-names = "tx0", "rx0", "tx1", "rx1",
-				    "tx2", "rx2", "tx3", "rx3";
-		};
-
-		mcspi2: spi@4809a000 {
-			#address-cells = <1>;
-			#size-cells = <0>;
-			compatible = "ti,omap2-mcspi";
-			ti,hwmods = "mcspi2";
-			reg = <0x4809a000 0x100>;
-			interrupts = <66>;
-			dmas = <&sdma 43 &sdma 44 &sdma 45 &sdma 46>;
-			dma-names = "tx0", "rx0", "tx1", "rx1";
-		};
-
-		rng: rng@480a0000 {
-			compatible = "ti,omap2-rng";
-			ti,hwmods = "rng";
-			reg = <0x480a0000 0x50>;
-			interrupts = <52>;
-		};
-
-		sham: sham@480a4000 {
-			compatible = "ti,omap2-sham";
-			ti,hwmods = "sham";
-			reg = <0x480a4000 0x64>;
-			interrupts = <51>;
-			dmas = <&sdma 13>;
-			dma-names = "rx";
-		};
-
-		uart1: serial@4806a000 {
-			compatible = "ti,omap2-uart";
-			ti,hwmods = "uart1";
-			reg = <0x4806a000 0x2000>;
-			interrupts = <72>;
-			dmas = <&sdma 49 &sdma 50>;
-			dma-names = "tx", "rx";
-			clock-frequency = <48000000>;
-		};
-
-		uart2: serial@4806c000 {
-			compatible = "ti,omap2-uart";
-			ti,hwmods = "uart2";
-			reg = <0x4806c000 0x400>;
-			interrupts = <73>;
-			dmas = <&sdma 51 &sdma 52>;
-			dma-names = "tx", "rx";
-			clock-frequency = <48000000>;
-		};
-
-		uart3: serial@4806e000 {
-			compatible = "ti,omap2-uart";
-			ti,hwmods = "uart3";
-			reg = <0x4806e000 0x400>;
-			interrupts = <74>;
-			dmas = <&sdma 53 &sdma 54>;
-			dma-names = "tx", "rx";
-			clock-frequency = <48000000>;
-		};
-
-		timer2_target: target-module@4802a000 {
-			compatible = "ti,sysc-omap2-timer", "ti,sysc";
-			reg = <0x4802a000 0x4>,
-			      <0x4802a010 0x4>,
-			      <0x4802a014 0x4>;
-			reg-names = "rev", "sysc", "syss";
-			ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
-					 SYSC_OMAP2_EMUFREE |
-					 SYSC_OMAP2_ENAWAKEUP |
-					 SYSC_OMAP2_SOFTRESET |
-					 SYSC_OMAP2_AUTOIDLE)>;
-			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
-					<SYSC_IDLE_NO>,
-					<SYSC_IDLE_SMART>;
-			ti,syss-mask = <1>;
-			clocks = <&gpt2_fck>, <&gpt2_ick>;
-			clock-names = "fck", "ick";
-			#address-cells = <1>;
-			#size-cells = <1>;
-			ranges = <0x0 0x4802a000 0x1000>;
-
-			timer2: timer@0 {
-				compatible = "ti,omap2420-timer";
-				reg = <0 0x400>;
-				interrupts = <38>;
-			};
-		};
-
-		timer3: timer@48078000 {
-			compatible = "ti,omap2420-timer";
-			reg = <0x48078000 0x400>;
-			interrupts = <39>;
-			ti,hwmods = "timer3";
-		};
-
-		timer4: timer@4807a000 {
-			compatible = "ti,omap2420-timer";
-			reg = <0x4807a000 0x400>;
-			interrupts = <40>;
-			ti,hwmods = "timer4";
-		};
-
-		timer5: timer@4807c000 {
-			compatible = "ti,omap2420-timer";
-			reg = <0x4807c000 0x400>;
-			interrupts = <41>;
-			ti,hwmods = "timer5";
-			ti,timer-dsp;
-		};
-
-		timer6: timer@4807e000 {
-			compatible = "ti,omap2420-timer";
-			reg = <0x4807e000 0x400>;
-			interrupts = <42>;
-			ti,hwmods = "timer6";
-			ti,timer-dsp;
-		};
-
-		timer7: timer@48080000 {
-			compatible = "ti,omap2420-timer";
-			reg = <0x48080000 0x400>;
-			interrupts = <43>;
-			ti,hwmods = "timer7";
-			ti,timer-dsp;
-		};
-
-		timer8: timer@48082000 {
-			compatible = "ti,omap2420-timer";
-			reg = <0x48082000 0x400>;
-			interrupts = <44>;
-			ti,hwmods = "timer8";
-			ti,timer-dsp;
-		};
-
-		timer9: timer@48084000 {
-			compatible = "ti,omap2420-timer";
-			reg = <0x48084000 0x400>;
-			interrupts = <45>;
-			ti,hwmods = "timer9";
-			ti,timer-pwm;
-		};
-
-		timer10: timer@48086000 {
-			compatible = "ti,omap2420-timer";
-			reg = <0x48086000 0x400>;
-			interrupts = <46>;
-			ti,hwmods = "timer10";
-			ti,timer-pwm;
-		};
-
-		timer11: timer@48088000 {
-			compatible = "ti,omap2420-timer";
-			reg = <0x48088000 0x400>;
-			interrupts = <47>;
-			ti,hwmods = "timer11";
-			ti,timer-pwm;
-		};
-
-		timer12: timer@4808a000 {
-			compatible = "ti,omap2420-timer";
-			reg = <0x4808a000 0x400>;
-			interrupts = <48>;
-			ti,hwmods = "timer12";
-			ti,timer-pwm;
-		};
-
-		dss: dss@48050000 {
-			compatible = "ti,omap2-dss";
-			reg = <0x48050000 0x400>;
-			status = "disabled";
-			ti,hwmods = "dss_core";
-			#address-cells = <1>;
-			#size-cells = <1>;
-			ranges;
-
-			dispc@48050400 {
-				compatible = "ti,omap2-dispc";
-				reg = <0x48050400 0x400>;
-				interrupts = <25>;
-				ti,hwmods = "dss_dispc";
-			};
-
-			rfbi: encoder@48050800 {
-				compatible = "ti,omap2-rfbi";
-				reg = <0x48050800 0x400>;
-				status = "disabled";
-				ti,hwmods = "dss_rfbi";
-			};
-
-			venc: encoder@48050c00 {
-				compatible = "ti,omap2-venc";
-				reg = <0x48050c00 0x400>;
-				status = "disabled";
-				ti,hwmods = "dss_venc";
-			};
-		};
-	};
-};

@@ -1,267 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * Device Tree Source for OMAP2420 clock data
- *
- * Copyright (C) 2014 Texas Instruments, Inc.
- */
-
-&prcm_clocks {
-	sys_clkout2_src_gate: sys_clkout2_src_gate@70 {
-		#clock-cells = <0>;
-		compatible = "ti,composite-no-wait-gate-clock";
-		clocks = <&core_ck>;
-		ti,bit-shift = <15>;
-		reg = <0x0070>;
-	};
-
-	sys_clkout2_src_mux: sys_clkout2_src_mux@70 {
-		#clock-cells = <0>;
-		compatible = "ti,composite-mux-clock";
-		clocks = <&core_ck>, <&sys_ck>, <&func_96m_ck>, <&func_54m_ck>;
-		ti,bit-shift = <8>;
-		reg = <0x0070>;
-	};
-
-	sys_clkout2_src: sys_clkout2_src {
-		#clock-cells = <0>;
-		compatible = "ti,composite-clock";
-		clocks = <&sys_clkout2_src_gate>, <&sys_clkout2_src_mux>;
-	};
-
-	sys_clkout2: sys_clkout2@70 {
-		#clock-cells = <0>;
-		compatible = "ti,divider-clock";
-		clocks = <&sys_clkout2_src>;
-		ti,bit-shift = <11>;
-		ti,max-div = <64>;
-		reg = <0x0070>;
-		ti,index-power-of-two;
-	};
-
-	dsp_gate_ick: dsp_gate_ick@810 {
-		#clock-cells = <0>;
-		compatible = "ti,composite-interface-clock";
-		clocks = <&dsp_fck>;
-		ti,bit-shift = <1>;
-		reg = <0x0810>;
-	};
-
-	dsp_div_ick: dsp_div_ick@840 {
-		#clock-cells = <0>;
-		compatible = "ti,composite-divider-clock";
-		clocks = <&dsp_fck>;
-		ti,bit-shift = <5>;
-		ti,max-div = <3>;
-		reg = <0x0840>;
-		ti,index-starts-at-one;
-	};
-
-	dsp_ick: dsp_ick {
-		#clock-cells = <0>;
-		compatible = "ti,composite-clock";
-		clocks = <&dsp_gate_ick>, <&dsp_div_ick>;
-	};
-
-	iva1_gate_ifck: iva1_gate_ifck@800 {
-		#clock-cells = <0>;
-		compatible = "ti,composite-gate-clock";
-		clocks = <&core_ck>;
-		ti,bit-shift = <10>;
-		reg = <0x0800>;
-	};
-
-	iva1_div_ifck: iva1_div_ifck@840 {
-		#clock-cells = <0>;
-		compatible = "ti,composite-divider-clock";
-		clocks = <&core_ck>;
-		ti,bit-shift = <8>;
-		reg = <0x0840>;
-		ti,dividers = <0>, <1>, <2>, <3>, <4>, <0>, <6>, <0>, <8>, <0>, <0>, <0>, <12>;
-	};
-
-	iva1_ifck: iva1_ifck {
-		#clock-cells = <0>;
-		compatible = "ti,composite-clock";
-		clocks = <&iva1_gate_ifck>, <&iva1_div_ifck>;
-	};
-
-	iva1_ifck_div: iva1_ifck_div {
-		#clock-cells = <0>;
-		compatible = "fixed-factor-clock";
-		clocks = <&iva1_ifck>;
-		clock-mult = <1>;
-		clock-div = <2>;
-	};
-
-	iva1_mpu_int_ifck: iva1_mpu_int_ifck@800 {
-		#clock-cells = <0>;
-		compatible = "ti,wait-gate-clock";
-		clocks = <&iva1_ifck_div>;
-		ti,bit-shift = <8>;
-		reg = <0x0800>;
-	};
-
-	wdt3_ick: wdt3_ick@210 {
-		#clock-cells = <0>;
-		compatible = "ti,omap3-interface-clock";
-		clocks = <&l4_ck>;
-		ti,bit-shift = <28>;
-		reg = <0x0210>;
-	};
-
-	wdt3_fck: wdt3_fck@200 {
-		#clock-cells = <0>;
-		compatible = "ti,wait-gate-clock";
-		clocks = <&func_32k_ck>;
-		ti,bit-shift = <28>;
-		reg = <0x0200>;
-	};
-
-	mmc_ick: mmc_ick@210 {
-		#clock-cells = <0>;
-		compatible = "ti,omap3-interface-clock";
-		clocks = <&l4_ck>;
-		ti,bit-shift = <26>;
-		reg = <0x0210>;
-	};
-
-	mmc_fck: mmc_fck@200 {
-		#clock-cells = <0>;
-		compatible = "ti,wait-gate-clock";
-		clocks = <&func_96m_ck>;
-		ti,bit-shift = <26>;
-		reg = <0x0200>;
-	};
-
-	eac_ick: eac_ick@210 {
-		#clock-cells = <0>;
-		compatible = "ti,omap3-interface-clock";
-		clocks = <&l4_ck>;
-		ti,bit-shift = <24>;
-		reg = <0x0210>;
-	};
-
-	eac_fck: eac_fck@200 {
-		#clock-cells = <0>;
-		compatible = "ti,wait-gate-clock";
-		clocks = <&func_96m_ck>;
-		ti,bit-shift = <24>;
-		reg = <0x0200>;
-	};
-
-	i2c1_fck: i2c1_fck@200 {
-		#clock-cells = <0>;
-		compatible = "ti,wait-gate-clock";
-		clocks = <&func_12m_ck>;
-		ti,bit-shift = <19>;
-		reg = <0x0200>;
-	};
-
-	i2c2_fck: i2c2_fck@200 {
-		#clock-cells = <0>;
-		compatible = "ti,wait-gate-clock";
-		clocks = <&func_12m_ck>;
-		ti,bit-shift = <20>;
-		reg = <0x0200>;
-	};
-
-	vlynq_ick: vlynq_ick@210 {
-		#clock-cells = <0>;
-		compatible = "ti,omap3-interface-clock";
-		clocks = <&core_l3_ck>;
-		ti,bit-shift = <3>;
-		reg = <0x0210>;
-	};
-
-	vlynq_gate_fck: vlynq_gate_fck@200 {
-		#clock-cells = <0>;
-		compatible = "ti,composite-gate-clock";
-		clocks = <&core_ck>;
-		ti,bit-shift = <3>;
-		reg = <0x0200>;
-	};
-
-	core_d18_ck: core_d18_ck {
-		#clock-cells = <0>;
-		compatible = "fixed-factor-clock";
-		clocks = <&core_ck>;
-		clock-mult = <1>;
-		clock-div = <18>;
-	};
-
-	vlynq_mux_fck: vlynq_mux_fck@240 {
-		#clock-cells = <0>;
-		compatible = "ti,composite-mux-clock";
-		clocks = <&func_96m_ck>, <&core_ck>, <&core_d2_ck>, <&core_d3_ck>, <&core_d4_ck>, <&dummy_ck>, <&core_d6_ck>, <&dummy_ck>, <&core_d8_ck>, <&core_d9_ck>, <&dummy_ck>, <&dummy_ck>, <&core_d12_ck>, <&dummy_ck>, <&dummy_ck>, <&dummy_ck>, <&core_d16_ck>, <&dummy_ck>, <&core_d18_ck>;
-		ti,bit-shift = <15>;
-		reg = <0x0240>;
-	};
-
-	vlynq_fck: vlynq_fck {
-		#clock-cells = <0>;
-		compatible = "ti,composite-clock";
-		clocks = <&vlynq_gate_fck>, <&vlynq_mux_fck>;
-	};
-};
-
-&prcm_clockdomains {
-	gfx_clkdm: gfx_clkdm {
-		compatible = "ti,clockdomain";
-		clocks = <&gfx_ick>;
-	};
-
-	core_l3_clkdm: core_l3_clkdm {
-		compatible = "ti,clockdomain";
-		clocks = <&cam_fck>, <&vlynq_ick>, <&usb_fck>;
-	};
-
-	wkup_clkdm: wkup_clkdm {
-		compatible = "ti,clockdomain";
-		clocks = <&dpll_ck>, <&emul_ck>, <&gpt1_ick>, <&gpios_ick>,
-			 <&gpios_fck>, <&mpu_wdt_ick>, <&mpu_wdt_fck>,
-			 <&sync_32k_ick>, <&wdt1_ick>, <&omapctrl_ick>;
-	};
-
-	iva1_clkdm: iva1_clkdm {
-		compatible = "ti,clockdomain";
-		clocks = <&iva1_mpu_int_ifck>;
-	};
-
-	dss_clkdm: dss_clkdm {
-		compatible = "ti,clockdomain";
-		clocks = <&dss_ick>, <&dss_54m_fck>;
-	};
-
-	core_l4_clkdm: core_l4_clkdm {
-		compatible = "ti,clockdomain";
-		clocks = <&ssi_l4_ick>, <&gpt2_ick>, <&gpt3_ick>, <&gpt4_ick>,
-			 <&gpt5_ick>, <&gpt6_ick>, <&gpt7_ick>, <&gpt8_ick>,
-			 <&gpt9_ick>, <&gpt10_ick>, <&gpt11_ick>, <&gpt12_ick>,
-			 <&mcbsp1_ick>, <&mcbsp2_ick>, <&mcspi1_ick>,
-			 <&mcspi1_fck>, <&mcspi2_ick>, <&mcspi2_fck>,
-			 <&uart1_ick>, <&uart1_fck>, <&uart2_ick>, <&uart2_fck>,
-			 <&uart3_ick>, <&uart3_fck>, <&cam_ick>,
-			 <&mailboxes_ick>, <&wdt4_ick>, <&wdt4_fck>,
-			 <&wdt3_ick>, <&wdt3_fck>, <&mspro_ick>, <&mspro_fck>,
-			 <&mmc_ick>, <&mmc_fck>, <&fac_ick>, <&fac_fck>,
-			 <&eac_ick>, <&eac_fck>, <&hdq_ick>, <&hdq_fck>,
-			 <&i2c1_ick>, <&i2c1_fck>, <&i2c2_ick>, <&i2c2_fck>,
-			 <&des_ick>, <&sha_ick>, <&rng_ick>, <&aes_ick>,
-			 <&pka_ick>;
-	};
-};
-
-&func_96m_ck {
-	compatible = "fixed-factor-clock";
-	clocks = <&apll96_ck>;
-	clock-mult = <1>;
-	clock-div = <1>;
-};
-
-&dsp_div_fck {
-	ti,dividers = <0>, <1>, <2>, <3>, <4>, <0>, <6>, <0>, <8>, <0>, <0>, <0>, <12>;
-};
-
-&ssi_ssr_sst_div_fck {
-	ti,dividers = <0>, <1>, <2>, <3>, <4>, <0>, <6>, <0>, <8>;
-};

@@ -1,63 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
- */
-/dts-v1/;
-
-#include "omap2420.dtsi"
-
-/ {
-	model = "TI OMAP2420 H4 board";
-	compatible = "ti,omap2420-h4", "ti,omap2420", "ti,omap2";
-
-	memory@80000000 {
-		device_type = "memory";
-		reg = <0x80000000 0x4000000>; /* 64 MB */
-	};
-};
-
-&gpmc {
-	ranges = <0 0 0x08000000 0x04000000>;
-
-	nor@0,0 {
-		compatible = "cfi-flash";
-		linux,mtd-name = "intel,ge28f256l18b85";
-		#address-cells = <1>;
-		#size-cells = <1>;
-		reg = <0 0 0x04000000>;
-		bank-width = <2>;
-
-		gpmc,mux-add-data = <2>;
-		gpmc,cs-on-ns = <10>;
-		gpmc,cs-rd-off-ns = <160>;
-		gpmc,cs-wr-off-ns = <160>;
-		gpmc,adv-on-ns = <20>;
-		gpmc,adv-rd-off-ns = <50>;
-		gpmc,adv-wr-off-ns = <50>;
-		gpmc,oe-on-ns = <60>;
-		gpmc,oe-off-ns = <120>;
-		gpmc,we-on-ns = <60>;
-		gpmc,we-off-ns = <120>;
-		gpmc,rd-cycle-ns = <170>;
-		gpmc,wr-cycle-ns = <170>;
-		gpmc,access-ns = <150>;
-		gpmc,page-burst-access-ns = <10>;
-
-		partition@0 {
-			label = "bootloader";
-			reg = <0 0x20000>;
-		};
-		partition@20000 {
-			label = "params";
-			reg = <0x20000 0x20000>;
-		};
-		partition@40000 {
-			label = "kernel";
-			reg = <0x40000 0x200000>;
-		};
-		partition@240000 {
-			label = "file-system";
-			reg = <0x240000 0x3dc0000>;
-		};
-	};
-};

@@ -1,9 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/dts-v1/;
-
-#include "omap2420-n8x0-common.dtsi"
-
-/ {
-	model = "Nokia N800";
-	compatible = "nokia,n800", "nokia,n8x0", "ti,omap2420", "ti,omap2";
-};

@@ -1,9 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/dts-v1/;
-
-#include "omap2420-n8x0-common.dtsi"
-
-/ {
-	model = "Nokia N810 WiMax";
-	compatible = "nokia,n810-wimax", "nokia,n8x0", "ti,omap2420", "ti,omap2";
-};

@@ -1,75 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/dts-v1/;
-
-#include "omap2420-n8x0-common.dtsi"
-
-/ {
-	model = "Nokia N810";
-	compatible = "nokia,n810", "nokia,n8x0", "ti,omap2420", "ti,omap2";
-
-	vio_ape: vio_ape {
-		compatible = "regulator-fixed";
-		regulator-name = "vio_ape";
-		regulator-min-microvolt = <1800000>;
-		regulator-max-microvolt = <1800000>;
-	};
-
-	v28_aic: v28_aic {
-		compatible = "regulator-fixed";
-		regulator-name = "v28_aic";
-		regulator-min-microvolt = <2800000>;
-		regulator-max-microvolt = <2800000>;
-	};
-};
-
-&omap2420_pmx {
-	mcbsp2_pins: mcbsp2-pins {
-		pinctrl-single,pins = <
-			OMAP2420_CORE_IOPAD(0x0124, PIN_INPUT | MUX_MODE1)	/* eac_ac_sclk.mcbsp2_clkx */
-			OMAP2420_CORE_IOPAD(0x0125, PIN_INPUT | MUX_MODE1)	/* eac_ac_fs.mcbsp2_fsx */
-			OMAP2420_CORE_IOPAD(0x0126, PIN_INPUT | MUX_MODE1)	/* eac_ac_din.mcbsp2_dr */
-			OMAP2420_CORE_IOPAD(0x0127, PIN_OUTPUT | MUX_MODE1)	/* eac_ac_dout.mcbsp2_dx */
-		>;
-	};
-
-	aic33_pins: aic33-pins {
-		pinctrl-single,pins = <
-			OMAP2420_CORE_IOPAD(0x0129, PIN_OUTPUT | MUX_MODE3)	/* eac_ac_rst.gpio118 */
-			OMAP2420_CORE_IOPAD(0x00e8, PIN_OUTPUT | MUX_MODE2)	/* vlynq_tx1.sys_clkout2 */
-		>;
-	};
-};
-
-&i2c2 {
-	aic33@18 {
-		compatible = "ti,tlv320aic33";
-		reg = <0x18>;
-
-		pinctrl-names = "default";
-		pinctrl-0 = <&aic33_pins>;
-
-		reset-gpios = <&gpio4 22 GPIO_ACTIVE_LOW>; /* gpio118 */
-
-		ai3x-gpio-func = <
-			10 /* AIC3X_GPIO1_FUNC_DIGITAL_MIC_MODCLK */
-			5 /* AIC3X_GPIO2_FUNC_DIGITAL_MIC_INPUT */
-		>;
-		ai3x-micbias-vg = <1>; /* 2V */
-
-		AVDD-supply = <&v28_aic>;
-		DRVDD-supply = <&v28_aic>;
-		IOVDD-supply = <&vio_ape>;
-		DVDD-supply = <&vio_ape>;
-
-		assigned-clocks = <&sys_clkout2_src>, <&sys_clkout2>;
-		assigned-clock-parents = <&func_96m_ck>;
-		assigned-clock-rates = <0>, <12000000>;
-	};
-};
-
-&mcbsp2 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&mcbsp2_pins>;
-
-	status = "okay";
-};

@@ -1,123 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-#include "omap2420.dtsi"
-
-/ {
-	memory@80000000 {
-		device_type = "memory";
-		reg = <0x80000000 0x8000000>; /* 128 MB */
-	};
-
-	chosen {
-		stdout-path = &uart3;
-	};
-
-	ocp {
-		i2c0 {
-			compatible = "i2c-cbus-gpio";
-			gpios = <&gpio3 2 GPIO_ACTIVE_HIGH /* gpio66 clk */
-				 &gpio3 1 GPIO_ACTIVE_HIGH /* gpio65 dat */
-				 &gpio3 0 GPIO_ACTIVE_HIGH /* gpio64 sel */
-				>;
-			#address-cells = <1>;
-			#size-cells = <0>;
-			retu: retu@1 {
-				compatible = "nokia,retu";
-				interrupt-parent = <&gpio4>;
-				interrupts = <12 IRQ_TYPE_EDGE_RISING>;
-				reg = <0x1>;
-			};
-		};
-	};
-};
-
-&i2c1 {
-	clock-frequency = <400000>;
-
-	pmic@72 {
-		compatible = "menelaus";
-		reg = <0x72>;
-		interrupts = <7 IRQ_TYPE_EDGE_RISING>;
-	};
-};
-
-&i2c2 {
-	clock-frequency = <400000>;
-};
-
-&gpmc {
-	ranges = <0 0 0x04000000 0x1000000>;	/* CS0: 16MB for OneNAND */
-
-	/* gpio-irq for dma: 26 */
-
-	onenand@0,0 {
-		#address-cells = <1>;
-		#size-cells = <1>;
-		compatible = "ti,omap2-onenand";
-		reg = <0 0 0x20000>;	/* CS0, offset 0, IO size 128K */
-
-		gpmc,sync-read;
-		gpmc,burst-length = <16>;
-		gpmc,burst-read;
-		gpmc,burst-wrap;
-		gpmc,device-width = <2>;
-		gpmc,mux-add-data = <2>;
-		gpmc,cs-on-ns = <0>;
-		gpmc,cs-rd-off-ns = <127>;
-		gpmc,cs-wr-off-ns = <109>;
-		gpmc,adv-on-ns = <0>;
-		gpmc,adv-rd-off-ns = <18>;
-		gpmc,adv-wr-off-ns = <18>;
-		gpmc,oe-on-ns = <27>;
-		gpmc,oe-off-ns = <127>;
-		gpmc,we-on-ns = <27>;
-		gpmc,we-off-ns = <72>;
-		gpmc,rd-cycle-ns = <145>;
-		gpmc,wr-cycle-ns = <136>;
-		gpmc,access-ns = <118>;
-		gpmc,page-burst-access-ns = <27>;
-		gpmc,bus-turnaround-ns = <0>;
-		gpmc,cycle2cycle-delay-ns = <0>;
-		gpmc,wait-monitoring-ns = <0>;
-		gpmc,clk-activation-ns = <9>;
-		gpmc,sync-clk-ps = <27000>;
-
-		/* MTD partition table corresponding to old board-n8x0 file. */
-		partition@0 {
-			label = "bootloader";
-			reg = <0x00000000 0x00020000>;
-			read-only;
-		};
-		partition@1 {
-			label = "config";
-			reg = <0x00020000 0x00060000>;
-		};
-		partition@2 {
-			label = "kernel";
-			reg = <0x00080000 0x00200000>;
-		};
-		partition@3 {
-			label = "initfs";
-			reg = <0x00280000 0x00400000>;
-		};
-		partition@4 {
-			label = "rootfs";
-			reg = <0x00680000 0x0f980000>;
-		};
-		partition@5 {
-			label = "omap2-onenand";
-			reg = <0x00000000 0x10000000>;
-		};
-	};
-};
-
-&mcspi2 {
-	status = "okay";
-
-	wifi@0 {
-		reg = <0>;
-		compatible = "st,stlc4560";
-		spi-max-frequency = <48000000>;
-		interrupts-extended = <&gpio3 23 IRQ_TYPE_EDGE_RISING>;
-		powerdown-gpios = <&gpio4 1 GPIO_ACTIVE_LOW>; /* gpio 97 */
-	};
-};

@@ -1,262 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * Device Tree Source for OMAP2420 SoC
- *
- * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
- */
-
-#include "omap2.dtsi"
-
-/ {
-	compatible = "ti,omap2420", "ti,omap2";
-
-	ocp {
-		l4: l4@48000000 {
-			compatible = "ti,omap2-l4", "simple-bus";
-			#address-cells = <1>;
-			#size-cells = <1>;
-			ranges = <0 0x48000000 0x100000>;
-
-			prcm: prcm@8000 {
-				compatible = "ti,omap2-prcm";
-				reg = <0x8000 0x1000>;
-
-				prcm_clocks: clocks {
-					#address-cells = <1>;
-					#size-cells = <0>;
-				};
-
-				prcm_clockdomains: clockdomains {
-				};
-			};
-
-			scm: scm@0 {
-				compatible = "ti,omap2-scm", "simple-bus";
-				reg = <0x0 0x1000>;
-				#address-cells = <1>;
-				#size-cells = <1>;
-				#pinctrl-cells = <1>;
-				ranges = <0 0x0 0x1000>;
-
-				omap2420_pmx: pinmux@30 {
-					compatible = "ti,omap2420-padconf",
-						     "pinctrl-single";
-					reg = <0x30 0x0113>;
-					#address-cells = <1>;
-					#size-cells = <0>;
-					#pinctrl-cells = <1>;
-					pinctrl-single,register-width = <8>;
-					pinctrl-single,function-mask = <0x3f>;
-				};
-
-				scm_conf: scm_conf@270 {
-					compatible = "syscon";
-					reg = <0x270 0x100>;
-					#address-cells = <1>;
-					#size-cells = <1>;
-
-					scm_clocks: clocks {
-						#address-cells = <1>;
-						#size-cells = <0>;
-					};
-				};
-
-				scm_clockdomains: clockdomains {
-				};
-			};
-
-			target-module@4000 {
-				compatible = "ti,sysc-omap2", "ti,sysc";
-				reg = <0x4000 0x4>,
-				      <0x4004 0x4>;
-				reg-names = "rev", "sysc";
-				ti,sysc-sidle = <SYSC_IDLE_FORCE>,
-						<SYSC_IDLE_NO>;
-				clocks = <&func_32k_ck>;
-				clock-names = "fck";
-				#address-cells = <1>;
-				#size-cells = <1>;
-				ranges = <0x0 0x4000 0x1000>;
-
-				counter32k: counter@0 {
-					compatible = "ti,omap-counter32k";
-					reg = <0 0x20>;
-				};
-			};
-		};
-
-		gpio1: gpio@48018000 {
-			compatible = "ti,omap2-gpio";
-			reg = <0x48018000 0x200>;
-			interrupts = <29>;
-			ti,hwmods = "gpio1";
-			ti,gpio-always-on;
-			#gpio-cells = <2>;
-			gpio-controller;
-			#interrupt-cells = <2>;
-			interrupt-controller;
-		};
-
-		gpio2: gpio@4801a000 {
-			compatible = "ti,omap2-gpio";
-			reg = <0x4801a000 0x200>;
-			interrupts = <30>;
-			ti,hwmods = "gpio2";
-			ti,gpio-always-on;
-			#gpio-cells = <2>;
-			gpio-controller;
-			#interrupt-cells = <2>;
-			interrupt-controller;
-		};
-
-		gpio3: gpio@4801c000 {
-			compatible = "ti,omap2-gpio";
-			reg = <0x4801c000 0x200>;
-			interrupts = <31>;
-			ti,hwmods = "gpio3";
-			ti,gpio-always-on;
-			#gpio-cells = <2>;
-			gpio-controller;
-			#interrupt-cells = <2>;
-			interrupt-controller;
-		};
-
-		gpio4: gpio@4801e000 {
-			compatible = "ti,omap2-gpio";
-			reg = <0x4801e000 0x200>;
-			interrupts = <32>;
-			ti,hwmods = "gpio4";
-			ti,gpio-always-on;
-			#gpio-cells = <2>;
-			gpio-controller;
-			#interrupt-cells = <2>;
-			interrupt-controller;
-		};
-
-		gpmc: gpmc@6800a000 {
-			compatible = "ti,omap2420-gpmc";
-			reg = <0x6800a000 0x1000>;
-			#address-cells = <2>;
-			#size-cells = <1>;
-			interrupts = <20>;
-			gpmc,num-cs = <8>;
-			gpmc,num-waitpins = <4>;
-			ti,hwmods = "gpmc";
-			interrupt-controller;
-			#interrupt-cells = <2>;
-			gpio-controller;
-			#gpio-cells = <2>;
-		};
-
-		mcbsp1: mcbsp@48074000 {
-			compatible = "ti,omap2420-mcbsp";
-			reg = <0x48074000 0xff>;
-			reg-names = "mpu";
-			interrupts = <59>, /* TX interrupt */
-				     <60>; /* RX interrupt */
-			interrupt-names = "tx", "rx";
-			ti,hwmods = "mcbsp1";
-			dmas = <&sdma 31>,
-			       <&sdma 32>;
-			dma-names = "tx", "rx";
-			status = "disabled";
-		};
-
-		mcbsp2: mcbsp@48076000 {
-			compatible = "ti,omap2420-mcbsp";
-			reg = <0x48076000 0xff>;
-			reg-names = "mpu";
-			interrupts = <62>, /* TX interrupt */
-				     <63>; /* RX interrupt */
-			interrupt-names = "tx", "rx";
-			ti,hwmods = "mcbsp2";
-			dmas = <&sdma 33>,
-			       <&sdma 34>;
-			dma-names = "tx", "rx";
-			status = "disabled";
-		};
-
-		msdi1: mmc@4809c000 {
-			compatible = "ti,omap2420-mmc";
-			ti,hwmods = "msdi1";
-			reg = <0x4809c000 0x80>;
-			interrupts = <83>;
-			dmas = <&sdma 61 &sdma 62>;
-			dma-names = "tx", "rx";
-		};
-
-		mailbox: mailbox@48094000 {
-			compatible = "ti,omap2-mailbox";
-			reg = <0x48094000 0x200>;
-			interrupts = <26>, <34>;
-			ti,hwmods = "mailbox";
-			#mbox-cells = <1>;
-			ti,mbox-num-users = <4>;
-			ti,mbox-num-fifos = <6>;
-			mbox_dsp: mbox-dsp {
-				ti,mbox-tx = <0 0 0>;
-				ti,mbox-rx = <1 0 0>;
-			};
-			mbox_iva: mbox-iva {
-				ti,mbox-tx = <2 1 3>;
-				ti,mbox-rx = <3 1 3>;
-			};
-		};
-
-		timer1_target: target-module@48028000 {
-			compatible = "ti,sysc-omap2-timer", "ti,sysc";
-			reg = <0x48028000 0x4>,
-			      <0x48028010 0x4>,
-			      <0x48028014 0x4>;
-			reg-names = "rev", "sysc", "syss";
-			ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
-					 SYSC_OMAP2_EMUFREE |
-					 SYSC_OMAP2_ENAWAKEUP |
-					 SYSC_OMAP2_SOFTRESET |
-					 SYSC_OMAP2_AUTOIDLE)>;
-			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
-					<SYSC_IDLE_NO>,
-					<SYSC_IDLE_SMART>;
-			ti,syss-mask = <1>;
-			clocks = <&gpt1_fck>, <&gpt1_ick>;
-			clock-names = "fck", "ick";
-			#address-cells = <1>;
-			#size-cells = <1>;
-			ranges = <0x0 0x48028000 0x1000>;
-
-			timer1: timer@0 {
-				compatible = "ti,omap2420-timer";
-				reg = <0 0x400>;
-				interrupts = <37>;
-				ti,timer-alwon;
-			};
-		};
-
-		wd_timer2: wdt@48022000 {
-			compatible = "ti,omap2-wdt";
-			ti,hwmods = "wd_timer2";
-			reg = <0x48022000 0x80>;
-		};
-	};
-};
-
-&i2c1 {
-	compatible = "ti,omap2420-i2c";
-};
-
-&i2c2 {
-	compatible = "ti,omap2420-i2c";
-};
-
-#include "omap24xx-clocks.dtsi"
-#include "omap2420-clocks.dtsi"
-
-/* Preferred always-on timer for clockevent */
-&timer1_target {
-	ti,no-reset-on-init;
-	ti,no-idle;
-	timer@0 {
-		assigned-clocks = <&gpt1_fck>;
-		assigned-clock-parents = <&func_32k_ck>;
-	};
-};

@@ -1,341 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * Device Tree Source for OMAP2430 clock data
- *
- * Copyright (C) 2014 Texas Instruments, Inc.
- */
-
-&scm_clocks {
-	mcbsp3_mux_fck: mcbsp3_mux_fck@78 {
-		#clock-cells = <0>;
-		compatible = "ti,composite-mux-clock";
-		clocks = <&func_96m_ck>, <&mcbsp_clks>;
-		reg = <0x78>;
-	};
-
-	mcbsp3_fck: mcbsp3_fck {
-		#clock-cells = <0>;
-		compatible = "ti,composite-clock";
-		clocks = <&mcbsp3_gate_fck>, <&mcbsp3_mux_fck>;
-	};
-
-	mcbsp4_mux_fck: mcbsp4_mux_fck@78 {
-		#clock-cells = <0>;
-		compatible = "ti,composite-mux-clock";
-		clocks = <&func_96m_ck>, <&mcbsp_clks>;
-		ti,bit-shift = <2>;
-		reg = <0x78>;
-	};
-
-	mcbsp4_fck: mcbsp4_fck {
-		#clock-cells = <0>;
-		compatible = "ti,composite-clock";
-		clocks = <&mcbsp4_gate_fck>, <&mcbsp4_mux_fck>;
-	};
-
-	mcbsp5_mux_fck: mcbsp5_mux_fck@78 {
-		#clock-cells = <0>;
-		compatible = "ti,composite-mux-clock";
-		clocks = <&func_96m_ck>, <&mcbsp_clks>;
-		ti,bit-shift = <4>;
-		reg = <0x78>;
-	};
-
-	mcbsp5_fck: mcbsp5_fck {
-		#clock-cells = <0>;
-		compatible = "ti,composite-clock";
-		clocks = <&mcbsp5_gate_fck>, <&mcbsp5_mux_fck>;
-	};
-};
-
-&prcm_clocks {
-	iva2_1_gate_ick: iva2_1_gate_ick@800 {
-		#clock-cells = <0>;
-		compatible = "ti,composite-gate-clock";
-		clocks = <&dsp_fck>;
-		ti,bit-shift = <0>;
-		reg = <0x0800>;
-	};
-
-	iva2_1_div_ick: iva2_1_div_ick@840 {
-		#clock-cells = <0>;
-		compatible = "ti,composite-divider-clock";
-		clocks = <&dsp_fck>;
-		ti,bit-shift = <5>;
-		ti,max-div = <3>;
-		reg = <0x0840>;
-		ti,index-starts-at-one;
-	};
-
-	iva2_1_ick: iva2_1_ick {
-		#clock-cells = <0>;
-		compatible = "ti,composite-clock";
-		clocks = <&iva2_1_gate_ick>, <&iva2_1_div_ick>;
-	};
-
-	mdm_gate_ick: mdm_gate_ick@c10 {
-		#clock-cells = <0>;
-		compatible = "ti,composite-interface-clock";
-		clocks = <&core_ck>;
-		ti,bit-shift = <0>;
-		reg = <0x0c10>;
-	};
-
-	mdm_div_ick: mdm_div_ick@c40 {
-		#clock-cells = <0>;
-		compatible = "ti,composite-divider-clock";
-		clocks = <&core_ck>;
-		reg = <0x0c40>;
-		ti,dividers = <0>, <1>, <0>, <0>, <4>, <0>, <6>, <0>, <0>, <9>;
-	};
-
-	mdm_ick: mdm_ick {
-		#clock-cells = <0>;
-		compatible = "ti,composite-clock";
-		clocks = <&mdm_gate_ick>, <&mdm_div_ick>;
-	};
-
-	mdm_osc_ck: mdm_osc_ck@c00 {
-		#clock-cells = <0>;
-		compatible = "ti,omap3-interface-clock";
-		clocks = <&osc_ck>;
-		ti,bit-shift = <1>;
-		reg = <0x0c00>;
-	};
-
-	mcbsp3_ick: mcbsp3_ick@214 {
-		#clock-cells = <0>;
-		compatible = "ti,omap3-interface-clock";
-		clocks = <&l4_ck>;
-		ti,bit-shift = <3>;
-		reg = <0x0214>;
-	};
-
-	mcbsp3_gate_fck: mcbsp3_gate_fck@204 {
-		#clock-cells = <0>;
-		compatible = "ti,composite-gate-clock";
-		clocks = <&mcbsp_clks>;
-		ti,bit-shift = <3>;
-		reg = <0x0204>;
-	};
-
-	mcbsp4_ick: mcbsp4_ick@214 {
-		#clock-cells = <0>;
-		compatible = "ti,omap3-interface-clock";
-		clocks = <&l4_ck>;
-		ti,bit-shift = <4>;
-		reg = <0x0214>;
-	};
-
-	mcbsp4_gate_fck: mcbsp4_gate_fck@204 {
-		#clock-cells = <0>;
-		compatible = "ti,composite-gate-clock";
-		clocks = <&mcbsp_clks>;
-		ti,bit-shift = <4>;
-		reg = <0x0204>;
-	};
-
-	mcbsp5_ick: mcbsp5_ick@214 {
-		#clock-cells = <0>;
-		compatible = "ti,omap3-interface-clock";
-		clocks = <&l4_ck>;
-		ti,bit-shift = <5>;
-		reg = <0x0214>;
-	};
-
-	mcbsp5_gate_fck: mcbsp5_gate_fck@204 {
-		#clock-cells = <0>;
-		compatible = "ti,composite-gate-clock";
-		clocks = <&mcbsp_clks>;
-		ti,bit-shift = <5>;
-		reg = <0x0204>;
-	};
-
-	mcspi3_ick: mcspi3_ick@214 {
-		#clock-cells = <0>;
-		compatible = "ti,omap3-interface-clock";
-		clocks = <&l4_ck>;
-		ti,bit-shift = <9>;
-		reg = <0x0214>;
-	};
-
-	mcspi3_fck: mcspi3_fck@204 {
-		#clock-cells = <0>;
-		compatible = "ti,wait-gate-clock";
-		clocks = <&func_48m_ck>;
-		ti,bit-shift = <9>;
-		reg = <0x0204>;
-	};
-
-	icr_ick: icr_ick@410 {
-		#clock-cells = <0>;
-		compatible = "ti,omap3-interface-clock";
-		clocks = <&sys_ck>;
-		ti,bit-shift = <6>;
-		reg = <0x0410>;
-	};
-
-	i2chs1_fck: i2chs1_fck@204 {
-		#clock-cells = <0>;
-		compatible = "ti,omap2430-interface-clock";
-		clocks = <&func_96m_ck>;
-		ti,bit-shift = <19>;
-		reg = <0x0204>;
-	};
-
-	i2chs2_fck: i2chs2_fck@204 {
-		#clock-cells = <0>;
-		compatible = "ti,omap2430-interface-clock";
-		clocks = <&func_96m_ck>;
-		ti,bit-shift = <20>;
-		reg = <0x0204>;
-	};
-
-	usbhs_ick: usbhs_ick@214 {
-		#clock-cells = <0>;
-		compatible = "ti,omap3-interface-clock";
-		clocks = <&core_l3_ck>;
-		ti,bit-shift = <6>;
-		reg = <0x0214>;
-	};
-
-	mmchs1_ick: mmchs1_ick@214 {
-		#clock-cells = <0>;
-		compatible = "ti,omap3-interface-clock";
-		clocks = <&l4_ck>;
-		ti,bit-shift = <7>;
-		reg = <0x0214>;
-	};
-
-	mmchs1_fck: mmchs1_fck@204 {
-		#clock-cells = <0>;
-		compatible = "ti,wait-gate-clock";
-		clocks = <&func_96m_ck>;
-		ti,bit-shift = <7>;
-		reg = <0x0204>;
-	};
-
-	mmchs2_ick: mmchs2_ick@214 {
-		#clock-cells = <0>;
-		compatible = "ti,omap3-interface-clock";
-		clocks = <&l4_ck>;
-		ti,bit-shift = <8>;
-		reg = <0x0214>;
-	};
-
-	mmchs2_fck: mmchs2_fck@204 {
-		#clock-cells = <0>;
-		compatible = "ti,wait-gate-clock";
-		clocks = <&func_96m_ck>;
-		ti,bit-shift = <8>;
-		reg = <0x0204>;
-	};
-
-	gpio5_ick: gpio5_ick@214 {
-		#clock-cells = <0>;
-		compatible = "ti,omap3-interface-clock";
-		clocks = <&l4_ck>;
-		ti,bit-shift = <10>;
-		reg = <0x0214>;
-	};
-
-	gpio5_fck: gpio5_fck@204 {
-		#clock-cells = <0>;
-		compatible = "ti,wait-gate-clock";
-		clocks = <&func_32k_ck>;
-		ti,bit-shift = <10>;
-		reg = <0x0204>;
-	};
-
-	mdm_intc_ick: mdm_intc_ick@214 {
-		#clock-cells = <0>;
-		compatible = "ti,omap3-interface-clock";
-		clocks = <&l4_ck>;
-		ti,bit-shift = <11>;
-		reg = <0x0214>;
-	};
-
-	mmchsdb1_fck: mmchsdb1_fck@204 {
-		#clock-cells = <0>;
-		compatible = "ti,wait-gate-clock";
-		clocks = <&func_32k_ck>;
-		ti,bit-shift = <16>;
-		reg = <0x0204>;
-	};
-
-	mmchsdb2_fck: mmchsdb2_fck@204 {
-		#clock-cells = <0>;
-		compatible = "ti,wait-gate-clock";
-		clocks = <&func_32k_ck>;
-		ti,bit-shift = <17>;
-		reg = <0x0204>;
-	};
-};
-
-&prcm_clockdomains {
-	gfx_clkdm: gfx_clkdm {
-		compatible = "ti,clockdomain";
-		clocks = <&gfx_ick>;
-	};
-
-	core_l3_clkdm: core_l3_clkdm {
-		compatible = "ti,clockdomain";
-		clocks = <&cam_fck>, <&usb_fck>, <&usbhs_ick>;
-	};
-
-	wkup_clkdm: wkup_clkdm {
-		compatible = "ti,clockdomain";
-		clocks = <&dpll_ck>, <&emul_ck>, <&gpt1_ick>, <&gpios_ick>,
-			 <&gpios_fck>, <&mpu_wdt_ick>, <&mpu_wdt_fck>,
-			 <&sync_32k_ick>, <&wdt1_ick>, <&omapctrl_ick>,
-			 <&icr_ick>;
-	};
-
-	dss_clkdm: dss_clkdm {
-		compatible = "ti,clockdomain";
-		clocks = <&dss_ick>, <&dss_54m_fck>;
-	};
-
-	core_l4_clkdm: core_l4_clkdm {
-		compatible = "ti,clockdomain";
-		clocks = <&ssi_l4_ick>, <&gpt2_ick>, <&gpt3_ick>, <&gpt4_ick>,
-			 <&gpt5_ick>, <&gpt6_ick>, <&gpt7_ick>, <&gpt8_ick>,
-			 <&gpt9_ick>, <&gpt10_ick>, <&gpt11_ick>, <&gpt12_ick>,
-			 <&mcbsp1_ick>, <&mcbsp2_ick>, <&mcbsp3_ick>,
-			 <&mcbsp4_ick>, <&mcbsp5_ick>, <&mcspi1_ick>,
-			 <&mcspi1_fck>, <&mcspi2_ick>, <&mcspi2_fck>,
-			 <&mcspi3_ick>, <&mcspi3_fck>, <&uart1_ick>,
-			 <&uart1_fck>, <&uart2_ick>, <&uart2_fck>, <&uart3_ick>,
-			 <&uart3_fck>, <&cam_ick>, <&mailboxes_ick>,
-			 <&wdt4_ick>, <&wdt4_fck>, <&mspro_ick>, <&mspro_fck>,
-			 <&fac_ick>, <&fac_fck>, <&hdq_ick>, <&hdq_fck>,
-			 <&i2c1_ick>, <&i2chs1_fck>, <&i2c2_ick>, <&i2chs2_fck>,
-			 <&des_ick>, <&sha_ick>, <&rng_ick>, <&aes_ick>,
-			 <&pka_ick>, <&mmchs1_ick>, <&mmchs1_fck>,
-			 <&mmchs2_ick>, <&mmchs2_fck>, <&gpio5_ick>,
-			 <&gpio5_fck>, <&mdm_intc_ick>, <&mmchsdb1_fck>,
-			 <&mmchsdb2_fck>;
-	};
-
-	mdm_clkdm: mdm_clkdm {
-		compatible = "ti,clockdomain";
-		clocks = <&mdm_osc_ck>;
-	};
-};
-
-&func_96m_ck {
-	compatible = "ti,mux-clock";
-	clocks = <&apll96_ck>, <&alt_ck>;
-	ti,bit-shift = <4>;
-	reg = <0x0540>;
-};
-
-&dsp_div_fck {
-	ti,max-div = <4>;
-	ti,index-starts-at-one;
-};
-
-&ssi_ssr_sst_div_fck {
-	ti,max-div = <5>;
-	ti,index-starts-at-one;
-};

@@ -1,70 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/
- */
-/dts-v1/;
-
-#include "omap2430.dtsi"
-
-/ {
-	model = "TI OMAP2430 SDP";
-	compatible = "ti,omap2430-sdp", "ti,omap2430", "ti,omap2";
-
-	memory@80000000 {
-		device_type = "memory";
-		reg = <0x80000000 0x8000000>; /* 128 MB */
-	};
-};
-
-&i2c2 {
-	clock-frequency = <100000>;
-
-	twl: twl@48 {
-		reg = <0x48>;
-		interrupts = <7>; /* SYS_NIRQ cascaded to intc */
-	};
-};
-
-#include "twl4030.dtsi"
-
-&mmc1 {
-	vmmc-supply = <&vmmc1>;
-	bus-width = <4>;
-};
-
-&gpmc {
-	ranges = <5 0 0x08000000 0x01000000>;
-	ethernet@gpmc {
-		compatible = "smsc,lan91c94";
-		interrupt-parent = <&gpio5>;
-		interrupts = <21 IRQ_TYPE_LEVEL_LOW>;	/* gpio149 */
-		reg = <5 0x300 0xf>;
-		bank-width = <2>;
-		gpmc,sync-clk-ps = <0>;
-		gpmc,mux-add-data = <2>;
-		gpmc,device-width = <1>;
-		gpmc,cycle2cycle-samecsen;
-		gpmc,cycle2cycle-diffcsen;
-		gpmc,cs-on-ns = <6>;
-		gpmc,cs-rd-off-ns = <187>;
-		gpmc,cs-wr-off-ns = <187>;
-		gpmc,adv-on-ns = <18>;
-		gpmc,adv-rd-off-ns = <48>;
-		gpmc,adv-wr-off-ns = <48>;
-		gpmc,oe-on-ns = <60>;
-		gpmc,oe-off-ns = <169>;
-		gpmc,we-on-ns = <66>;
-		gpmc,we-off-ns = <169>;
-		gpmc,rd-cycle-ns = <187>;
-		gpmc,wr-cycle-ns = <187>;
-		gpmc,access-ns = <187>;
-		gpmc,page-burst-access-ns = <24>;
-		gpmc,bus-turnaround-ns = <24>;
-		gpmc,cycle2cycle-delay-ns = <24>;
-		gpmc,wait-monitoring-ns = <0>;
-		gpmc,clk-activation-ns = <0>;
-		gpmc,wr-data-mux-bus-ns = <0>;
-		gpmc,wr-access-ns = <0>;
-	};
-};
-

@@ -1,366 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * Device Tree Source for OMAP243x SoC
- *
- * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
- */
-
-#include "omap2.dtsi"
-
-/ {
-	compatible = "ti,omap2430", "ti,omap2";
-
-	ocp {
-		l4_wkup: l4_wkup@49000000 {
-			compatible = "ti,omap2-l4-wkup", "simple-bus";
-			#address-cells = <1>;
-			#size-cells = <1>;
-			ranges = <0 0x49000000 0x31000>;
-
-			prcm: prcm@6000 {
-				compatible = "ti,omap2-prcm";
-				reg = <0x6000 0x1000>;
-
-				prcm_clocks: clocks {
-					#address-cells = <1>;
-					#size-cells = <0>;
-				};
-
-				prcm_clockdomains: clockdomains {
-				};
-			};
-
-			scm: scm@2000 {
-				compatible = "ti,omap2-scm", "simple-bus";
-				reg = <0x2000 0x1000>;
-				#address-cells = <1>;
-				#size-cells = <1>;
-				#pinctrl-cells = <1>;
-				ranges = <0 0x2000 0x1000>;
-
-				omap2430_pmx: pinmux@30 {
-					compatible = "ti,omap2430-padconf",
-						     "pinctrl-single";
-					reg = <0x30 0x0154>;
-					#address-cells = <1>;
-					#size-cells = <0>;
-					#pinctrl-cells = <1>;
-					pinctrl-single,register-width = <8>;
-					pinctrl-single,function-mask = <0x3f>;
-				};
-
-				scm_conf: scm_conf@270 {
-					compatible = "ti,omap2-scm-conf", "syscon",
-						     "simple-bus";
-					reg = <0x270 0x240>;
-					#address-cells = <1>;
-					#size-cells = <1>;
-					ranges = <0 0x270 0x240>;
-
-					scm_clocks: clocks {
-						#address-cells = <1>;
-						#size-cells = <0>;
-					};
-
-					pbias_regulator: pbias_regulator@230 {
-						compatible = "ti,pbias-omap2", "ti,pbias-omap";
-						reg = <0x230 0x4>;
-						syscon = <&scm_conf>;
-						pbias_mmc_reg: pbias_mmc_omap2430 {
-							regulator-name = "pbias_mmc_omap2430";
-							regulator-min-microvolt = <1800000>;
-							regulator-max-microvolt = <3000000>;
-						};
-					};
-				};
-
-				scm_clockdomains: clockdomains {
-				};
-			};
-
-			target-module@20000 {
-				compatible = "ti,sysc-omap2", "ti,sysc";
-				reg = <0x20000 0x4>,
-				      <0x20004 0x4>;
-				reg-names = "rev", "sysc";
-				ti,sysc-sidle = <SYSC_IDLE_FORCE>,
-						<SYSC_IDLE_NO>;
-				clocks = <&func_32k_ck>;
-				clock-names = "fck";
-				#address-cells = <1>;
-				#size-cells = <1>;
-				ranges = <0x0 0x20000 0x1000>;
-
-				counter32k: counter@0 {
-					compatible = "ti,omap-counter32k";
-					reg = <0 0x20>;
-				};
-			};
-		};
-
-		gpio1: gpio@4900c000 {
-			compatible = "ti,omap2-gpio";
-			reg = <0x4900c000 0x200>;
-			interrupts = <29>;
-			ti,hwmods = "gpio1";
-			ti,gpio-always-on;
-			#gpio-cells = <2>;
-			gpio-controller;
-			#interrupt-cells = <2>;
-			interrupt-controller;
-		};
-
-		gpio2: gpio@4900e000 {
-			compatible = "ti,omap2-gpio";
-			reg = <0x4900e000 0x200>;
-			interrupts = <30>;
-			ti,hwmods = "gpio2";
-			ti,gpio-always-on;
-			#gpio-cells = <2>;
-			gpio-controller;
-			#interrupt-cells = <2>;
-			interrupt-controller;
-		};
-
-		gpio3: gpio@49010000 {
-			compatible = "ti,omap2-gpio";
-			reg = <0x49010000 0x200>;
-			interrupts = <31>;
-			ti,hwmods = "gpio3";
-			ti,gpio-always-on;
-			#gpio-cells = <2>;
-			gpio-controller;
-			#interrupt-cells = <2>;
-			interrupt-controller;
-		};
-
-		gpio4: gpio@49012000 {
-			compatible = "ti,omap2-gpio";
-			reg = <0x49012000 0x200>;
-			interrupts = <32>;
-			ti,hwmods = "gpio4";
-			ti,gpio-always-on;
-			#gpio-cells = <2>;
-			gpio-controller;
-			#interrupt-cells = <2>;
-			interrupt-controller;
-		};
-
-		gpio5: gpio@480b6000 {
-			compatible = "ti,omap2-gpio";
-			reg = <0x480b6000 0x200>;
-			interrupts = <33>;
-			ti,hwmods = "gpio5";
-			#gpio-cells = <2>;
-			gpio-controller;
-			#interrupt-cells = <2>;
-			interrupt-controller;
-		};
-
-		gpmc: gpmc@6e000000 {
-			compatible = "ti,omap2430-gpmc";
-			reg = <0x6e000000 0x1000>;
-			#address-cells = <2>;
-			#size-cells = <1>;
-			interrupts = <20>;
-			gpmc,num-cs = <8>;
-			gpmc,num-waitpins = <4>;
-			ti,hwmods = "gpmc";
-			interrupt-controller;
-			#interrupt-cells = <2>;
-			gpio-controller;
-			#gpio-cells = <2>;
-		};
-
-		mcbsp1: mcbsp@48074000 {
-			compatible = "ti,omap2430-mcbsp";
-			reg = <0x48074000 0xff>;
-			reg-names = "mpu";
-			interrupts = <64>, /* OCP compliant interrupt */
-				     <59>, /* TX interrupt */
-				     <60>, /* RX interrupt */
-				     <61>; /* RX overflow interrupt */
-			interrupt-names = "common", "tx", "rx", "rx_overflow";
-			ti,buffer-size = <128>;
-			ti,hwmods = "mcbsp1";
-			dmas = <&sdma 31>,
-			       <&sdma 32>;
-			dma-names = "tx", "rx";
-			status = "disabled";
-		};
-
-		mcbsp2: mcbsp@48076000 {
-			compatible = "ti,omap2430-mcbsp";
-			reg = <0x48076000 0xff>;
-			reg-names = "mpu";
-			interrupts = <16>, /* OCP compliant interrupt */
-				     <62>, /* TX interrupt */
-				     <63>; /* RX interrupt */
-			interrupt-names = "common", "tx", "rx";
-			ti,buffer-size = <128>;
-			ti,hwmods = "mcbsp2";
-			dmas = <&sdma 33>,
-			       <&sdma 34>;
-			dma-names = "tx", "rx";
-			status = "disabled";
-		};
-
-		mcbsp3: mcbsp@4808c000 {
-			compatible = "ti,omap2430-mcbsp";
-			reg = <0x4808c000 0xff>;
-			reg-names = "mpu";
-			interrupts = <17>, /* OCP compliant interrupt */
-				     <89>, /* TX interrupt */
-				     <90>; /* RX interrupt */
-			interrupt-names = "common", "tx", "rx";
-			ti,buffer-size = <128>;
-			ti,hwmods = "mcbsp3";
-			dmas = <&sdma 17>,
-			       <&sdma 18>;
-			dma-names = "tx", "rx";
-			status = "disabled";
-		};
-
-		mcbsp4: mcbsp@4808e000 {
-			compatible = "ti,omap2430-mcbsp";
-			reg = <0x4808e000 0xff>;
-			reg-names = "mpu";
-			interrupts = <18>, /* OCP compliant interrupt */
-				     <54>, /* TX interrupt */
-				     <55>; /* RX interrupt */
-			interrupt-names = "common", "tx", "rx";
-			ti,buffer-size = <128>;
-			ti,hwmods = "mcbsp4";
-			dmas = <&sdma 19>,
-			       <&sdma 20>;
-			dma-names = "tx", "rx";
-			status = "disabled";
-		};
-
-		mcbsp5: mcbsp@48096000 {
-			compatible = "ti,omap2430-mcbsp";
-			reg = <0x48096000 0xff>;
-			reg-names = "mpu";
-			interrupts = <19>, /* OCP compliant interrupt */
-				     <81>, /* TX interrupt */
-				     <82>; /* RX interrupt */
-			interrupt-names = "common", "tx", "rx";
-			ti,buffer-size = <128>;
-			ti,hwmods = "mcbsp5";
-			dmas = <&sdma 21>,
-			       <&sdma 22>;
-			dma-names = "tx", "rx";
-			status = "disabled";
-		};
-
-		mmc1: mmc@4809c000 {
-			compatible = "ti,omap2-hsmmc";
-			reg = <0x4809c000 0x200>;
-			interrupts = <83>;
-			ti,hwmods = "mmc1";
-			ti,dual-volt;
-			dmas = <&sdma 61>, <&sdma 62>;
-			dma-names = "tx", "rx";
-			pbias-supply = <&pbias_mmc_reg>;
-		};
-
-		mmc2: mmc@480b4000 {
-			compatible = "ti,omap2-hsmmc";
-			reg = <0x480b4000 0x200>;
-			interrupts = <86>;
-			ti,hwmods = "mmc2";
-			dmas = <&sdma 47>, <&sdma 48>;
-			dma-names = "tx", "rx";
-		};
-
-		mailbox: mailbox@48094000 {
-			compatible = "ti,omap2-mailbox";
-			reg = <0x48094000 0x200>;
-			interrupts = <26>;
-			ti,hwmods = "mailbox";
-			#mbox-cells = <1>;
-			ti,mbox-num-users = <4>;
-			ti,mbox-num-fifos = <6>;
-			mbox_dsp: mbox-dsp {
-				ti,mbox-tx = <0 0 0>;
-				ti,mbox-rx = <1 0 0>;
-			};
-		};
-
-		timer1_target: target-module@49018000 {
-			compatible = "ti,sysc-omap2-timer", "ti,sysc";
-			reg = <0x49018000 0x4>,
-			      <0x49018010 0x4>,
-			      <0x49018014 0x4>;
-			reg-names = "rev", "sysc", "syss";
-			ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
-					 SYSC_OMAP2_EMUFREE |
-					 SYSC_OMAP2_ENAWAKEUP |
-					 SYSC_OMAP2_SOFTRESET |
-					 SYSC_OMAP2_AUTOIDLE)>;
-			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
-					<SYSC_IDLE_NO>,
-					<SYSC_IDLE_SMART>;
-			ti,syss-mask = <1>;
-			clocks = <&gpt1_fck>, <&gpt1_ick>;
-			clock-names = "fck", "ick";
-			#address-cells = <1>;
-			#size-cells = <1>;
-			ranges = <0x0 0x49018000 0x1000>;
-
-			timer1: timer@0 {
-				compatible = "ti,omap2420-timer";
-				reg = <0 0x400>;
-				interrupts = <37>;
-				ti,timer-alwon;
-			};
-		};
-
-		mcspi3: spi@480b8000 {
-			compatible = "ti,omap2-mcspi";
-			ti,hwmods = "mcspi3";
-			reg = <0x480b8000 0x100>;
-			interrupts = <91>;
-			dmas = <&sdma 15 &sdma 16 &sdma 23 &sdma 24>;
-			dma-names = "tx0", "rx0", "tx1", "rx1";
-		};
-
-		usb_otg_hs: usb_otg_hs@480ac000 {
-			compatible = "ti,omap2-musb";
-			ti,hwmods = "usb_otg_hs";
-			reg = <0x480ac000 0x1000>;
-			interrupts = <93>;
-		};
-
-		wd_timer2: watchdog@49016000 {
-			compatible = "ti,omap2-wdt";
-			ti,hwmods = "wd_timer2";
-			reg = <0x49016000 0x80>;
-		};
-	};
-};
-
-&sdma {
-	compatible = "ti,omap2430-sdma", "ti,omap-sdma";
-};
-
-&i2c1 {
-	compatible = "ti,omap2430-i2c";
-};
-
-&i2c2 {
-	compatible = "ti,omap2430-i2c";
-};
-
-#include "omap24xx-clocks.dtsi"
-#include "omap2430-clocks.dtsi"
-
-/* Preferred always-on timer for clockevent */
-&timer1_target {
-	ti,no-reset-on-init;
-	ti,no-idle;
-	timer@0 {
-		assigned-clocks = <&gpt1_fck>;
-		assigned-clock-parents = <&func_32k_ck>;
-	};
-};

@@ -1,1241 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * Device Tree Source for OMAP24xx clock data
- *
- * Copyright (C) 2014 Texas Instruments, Inc.
- */
-&scm_clocks {
-	mcbsp1_mux_fck: mcbsp1_mux_fck@4 {
-		#clock-cells = <0>;
-		compatible = "ti,composite-mux-clock";
-		clocks = <&func_96m_ck>, <&mcbsp_clks>;
-		ti,bit-shift = <2>;
-		reg = <0x4>;
-	};
-
-	mcbsp1_fck: mcbsp1_fck {
-		#clock-cells = <0>;
-		compatible = "ti,composite-clock";
-		clocks = <&mcbsp1_gate_fck>, <&mcbsp1_mux_fck>;
-	};
-
-	mcbsp2_mux_fck: mcbsp2_mux_fck@4 {
-		#clock-cells = <0>;
-		compatible = "ti,composite-mux-clock";
-		clocks = <&func_96m_ck>, <&mcbsp_clks>;
-		ti,bit-shift = <6>;
-		reg = <0x4>;
-	};
-
-	mcbsp2_fck: mcbsp2_fck {
-		#clock-cells = <0>;
-		compatible = "ti,composite-clock";
-		clocks = <&mcbsp2_gate_fck>, <&mcbsp2_mux_fck>;
-	};
-};
-
-&prcm_clocks {
-	func_32k_ck: func_32k_ck {
-		#clock-cells = <0>;
-		compatible = "fixed-clock";
-		clock-frequency = <32768>;
-	};
-
-	secure_32k_ck: secure_32k_ck {
-		#clock-cells = <0>;
-		compatible = "fixed-clock";
-		clock-frequency = <32768>;
-	};
-
-	virt_12m_ck: virt_12m_ck {
-		#clock-cells = <0>;
-		compatible = "fixed-clock";
-		clock-frequency = <12000000>;
-	};
-
-	virt_13m_ck: virt_13m_ck {
-		#clock-cells = <0>;
-		compatible = "fixed-clock";
-		clock-frequency = <13000000>;
-	};
-
-	virt_19200000_ck: virt_19200000_ck {
-		#clock-cells = <0>;
-		compatible = "fixed-clock";
-		clock-frequency = <19200000>;
-	};
-
-	virt_26m_ck: virt_26m_ck {
-		#clock-cells = <0>;
-		compatible = "fixed-clock";
-		clock-frequency = <26000000>;
-	};
-
-	aplls_clkin_ck: aplls_clkin_ck@540 {
-		#clock-cells = <0>;
-		compatible = "ti,mux-clock";
-		clocks = <&virt_19200000_ck>, <&virt_26m_ck>, <&virt_13m_ck>, <&virt_12m_ck>;
-		ti,bit-shift = <23>;
-		reg = <0x0540>;
-	};
-
-	aplls_clkin_x2_ck: aplls_clkin_x2_ck {
-		#clock-cells = <0>;
-		compatible = "fixed-factor-clock";
-		clocks = <&aplls_clkin_ck>;
-		clock-mult = <2>;
-		clock-div = <1>;
-	};
-
-	osc_ck: osc_ck@60 {
-		#clock-cells = <0>;
-		compatible = "ti,mux-clock";
-		clocks = <&aplls_clkin_ck>, <&aplls_clkin_x2_ck>;
-		ti,bit-shift = <6>;
-		reg = <0x0060>;
-		ti,index-starts-at-one;
-	};
-
-	sys_ck: sys_ck@60 {
-		#clock-cells = <0>;
-		compatible = "ti,divider-clock";
-		clocks = <&osc_ck>;
-		ti,bit-shift = <6>;
-		ti,max-div = <3>;
-		reg = <0x0060>;
-		ti,index-starts-at-one;
-	};
-
-	alt_ck: alt_ck {
-		#clock-cells = <0>;
-		compatible = "fixed-clock";
-		clock-frequency = <54000000>;
-	};
-
-	mcbsp_clks: mcbsp_clks {
-		#clock-cells = <0>;
-		compatible = "fixed-clock";
-		clock-frequency = <0x0>;
-	};
-
-	dpll_ck: dpll_ck@500 {
-		#clock-cells = <0>;
-		compatible = "ti,omap2-dpll-core-clock";
-		clocks = <&sys_ck>, <&sys_ck>;
-		reg = <0x0500>, <0x0540>;
-	};
-
-	apll96_ck: apll96_ck@500 {
-		#clock-cells = <0>;
-		compatible = "ti,omap2-apll-clock";
-		clocks = <&sys_ck>;
-		ti,bit-shift = <2>;
-		ti,idlest-shift = <8>;
-		ti,clock-frequency = <96000000>;
-		reg = <0x0500>, <0x0530>, <0x0520>;
-	};
-
-	apll54_ck: apll54_ck@500 {
-		#clock-cells = <0>;
-		compatible = "ti,omap2-apll-clock";
-		clocks = <&sys_ck>;
-		ti,bit-shift = <6>;
-		ti,idlest-shift = <9>;
-		ti,clock-frequency = <54000000>;
-		reg = <0x0500>, <0x0530>, <0x0520>;
-	};
-
-	func_54m_ck: func_54m_ck@540 {
-		#clock-cells = <0>;
-		compatible = "ti,mux-clock";
-		clocks = <&apll54_ck>, <&alt_ck>;
-		ti,bit-shift = <5>;
-		reg = <0x0540>;
-	};
-
-	core_ck: core_ck {
-		#clock-cells = <0>;
-		compatible = "fixed-factor-clock";
-		clocks = <&dpll_ck>;
-		clock-mult = <1>;
-		clock-div = <1>;
-	};
-
-	func_96m_ck: func_96m_ck@540 {
-		#clock-cells = <0>;
-	};
-
-	apll96_d2_ck: apll96_d2_ck {
-		#clock-cells = <0>;
-		compatible = "fixed-factor-clock";
-		clocks = <&apll96_ck>;
-		clock-mult = <1>;
-		clock-div = <2>;
-	};
-
-	func_48m_ck: func_48m_ck@540 {
-		#clock-cells = <0>;
-		compatible = "ti,mux-clock";
-		clocks = <&apll96_d2_ck>, <&alt_ck>;
-		ti,bit-shift = <3>;
-		reg = <0x0540>;
-	};
-
-	func_12m_ck: func_12m_ck {
-		#clock-cells = <0>;
-		compatible = "fixed-factor-clock";
-		clocks = <&func_48m_ck>;
-		clock-mult = <1>;
-		clock-div = <4>;
-	};
-
-	sys_clkout_src_gate: sys_clkout_src_gate@70 {
-		#clock-cells = <0>;
-		compatible = "ti,composite-no-wait-gate-clock";
-		clocks = <&core_ck>;
-		ti,bit-shift = <7>;
-		reg = <0x0070>;
-	};
-
-	sys_clkout_src_mux: sys_clkout_src_mux@70 {
-		#clock-cells = <0>;
-		compatible = "ti,composite-mux-clock";
-		clocks = <&core_ck>, <&sys_ck>, <&func_96m_ck>, <&func_54m_ck>;
-		reg = <0x0070>;
-	};
-
-	sys_clkout_src: sys_clkout_src {
-		#clock-cells = <0>;
-		compatible = "ti,composite-clock";
-		clocks = <&sys_clkout_src_gate>, <&sys_clkout_src_mux>;
-	};
-
-	sys_clkout: sys_clkout@70 {
-		#clock-cells = <0>;
-		compatible = "ti,divider-clock";
-		clocks = <&sys_clkout_src>;
-		ti,bit-shift = <3>;
-		ti,max-div = <64>;
-		reg = <0x0070>;
-		ti,index-power-of-two;
-	};
-
-	emul_ck: emul_ck@78 {
-		#clock-cells = <0>;
-		compatible = "ti,gate-clock";
-		clocks = <&func_54m_ck>;
-		ti,bit-shift = <0>;
-		reg = <0x0078>;
-	};
-
-	mpu_ck: mpu_ck@140 {
-		#clock-cells = <0>;
-		compatible = "ti,divider-clock";
-		clocks = <&core_ck>;
-		ti,max-div = <31>;
-		reg = <0x0140>;
-		ti,index-starts-at-one;
-	};
-
-	dsp_gate_fck: dsp_gate_fck@800 {
-		#clock-cells = <0>;
-		compatible = "ti,composite-gate-clock";
-		clocks = <&core_ck>;
-		ti,bit-shift = <0>;
-		reg = <0x0800>;
-	};
-
-	dsp_div_fck: dsp_div_fck@840 {
-		#clock-cells = <0>;
-		compatible = "ti,composite-divider-clock";
-		clocks = <&core_ck>;
-		reg = <0x0840>;
-	};
-
-	dsp_fck: dsp_fck {
-		#clock-cells = <0>;
-		compatible = "ti,composite-clock";
-		clocks = <&dsp_gate_fck>, <&dsp_div_fck>;
-	};
-
-	core_l3_ck: core_l3_ck@240 {
-		#clock-cells = <0>;
-		compatible = "ti,divider-clock";
-		clocks = <&core_ck>;
-		ti,max-div = <31>;
-		reg = <0x0240>;
-		ti,index-starts-at-one;
-	};
-
-	gfx_3d_gate_fck: gfx_3d_gate_fck@300 {
-		#clock-cells = <0>;
-		compatible = "ti,composite-gate-clock";
-		clocks = <&core_l3_ck>;
-		ti,bit-shift = <2>;
-		reg = <0x0300>;
-	};
-
-	gfx_3d_div_fck: gfx_3d_div_fck@340 {
-		#clock-cells = <0>;
-		compatible = "ti,composite-divider-clock";
-		clocks = <&core_l3_ck>;
-		ti,max-div = <4>;
-		reg = <0x0340>;
-		ti,index-starts-at-one;
-	};
-
-	gfx_3d_fck: gfx_3d_fck {
-		#clock-cells = <0>;
-		compatible = "ti,composite-clock";
-		clocks = <&gfx_3d_gate_fck>, <&gfx_3d_div_fck>;
-	};
-
-	gfx_2d_gate_fck: gfx_2d_gate_fck@300 {
-		#clock-cells = <0>;
-		compatible = "ti,composite-gate-clock";
-		clocks = <&core_l3_ck>;
-		ti,bit-shift = <1>;
-		reg = <0x0300>;
-	};
-
-	gfx_2d_div_fck: gfx_2d_div_fck@340 {
-		#clock-cells = <0>;
-		compatible = "ti,composite-divider-clock";
-		clocks = <&core_l3_ck>;
-		ti,max-div = <4>;
-		reg = <0x0340>;
-		ti,index-starts-at-one;
-	};
-
-	gfx_2d_fck: gfx_2d_fck {
-		#clock-cells = <0>;
-		compatible = "ti,composite-clock";
-		clocks = <&gfx_2d_gate_fck>, <&gfx_2d_div_fck>;
-	};
-
-	gfx_ick: gfx_ick@310 {
-		#clock-cells = <0>;
-		compatible = "ti,wait-gate-clock";
-		clocks = <&core_l3_ck>;
-		ti,bit-shift = <0>;
-		reg = <0x0310>;
-	};
-
-	l4_ck: l4_ck@240 {
-		#clock-cells = <0>;
-		compatible = "ti,divider-clock";
-		clocks = <&core_l3_ck>;
-		ti,bit-shift = <5>;
-		ti,max-div = <3>;
-		reg = <0x0240>;
-		ti,index-starts-at-one;
-	};
-
-	dss_ick: dss_ick@210 {
-		#clock-cells = <0>;
-		compatible = "ti,omap3-no-wait-interface-clock";
-		clocks = <&l4_ck>;
-		ti,bit-shift = <0>;
-		reg = <0x0210>;
-	};
-
-	dss1_gate_fck: dss1_gate_fck@200 {
-		#clock-cells = <0>;
-		compatible = "ti,composite-no-wait-gate-clock";
-		clocks = <&core_ck>;
-		ti,bit-shift = <0>;
-		reg = <0x0200>;
-	};
-
-	core_d2_ck: core_d2_ck {
-		#clock-cells = <0>;
-		compatible = "fixed-factor-clock";
-		clocks = <&core_ck>;
-		clock-mult = <1>;
-		clock-div = <2>;
-	};
-
-	core_d3_ck: core_d3_ck {
-		#clock-cells = <0>;
-		compatible = "fixed-factor-clock";
-		clocks = <&core_ck>;
-		clock-mult = <1>;
-		clock-div = <3>;
-	};
-
-	core_d4_ck: core_d4_ck {
-		#clock-cells = <0>;
-		compatible = "fixed-factor-clock";
-		clocks = <&core_ck>;
-		clock-mult = <1>;
-		clock-div = <4>;
-	};
-
-	core_d5_ck: core_d5_ck {
-		#clock-cells = <0>;
-		compatible = "fixed-factor-clock";
-		clocks = <&core_ck>;
-		clock-mult = <1>;
-		clock-div = <5>;
-	};
-
-	core_d6_ck: core_d6_ck {
-		#clock-cells = <0>;
-		compatible = "fixed-factor-clock";
-		clocks = <&core_ck>;
-		clock-mult = <1>;
-		clock-div = <6>;
-	};
-
-	dummy_ck: dummy_ck {
-		#clock-cells = <0>;
-		compatible = "fixed-clock";
-		clock-frequency = <0>;
-	};
-
-	core_d8_ck: core_d8_ck {
-		#clock-cells = <0>;
-		compatible = "fixed-factor-clock";
-		clocks = <&core_ck>;
-		clock-mult = <1>;
-		clock-div = <8>;
-	};
-
-	core_d9_ck: core_d9_ck {
-		#clock-cells = <0>;
-		compatible = "fixed-factor-clock";
-		clocks = <&core_ck>;
-		clock-mult = <1>;
-		clock-div = <9>;
-	};
-
-	core_d12_ck: core_d12_ck {
-		#clock-cells = <0>;
-		compatible = "fixed-factor-clock";
-		clocks = <&core_ck>;
-		clock-mult = <1>;
-		clock-div = <12>;
-	};
-
-	core_d16_ck: core_d16_ck {
-		#clock-cells = <0>;
-		compatible = "fixed-factor-clock";
-		clocks = <&core_ck>;
-		clock-mult = <1>;
-		clock-div = <16>;
-	};
-
-	dss1_mux_fck: dss1_mux_fck@240 {
-		#clock-cells = <0>;
-		compatible = "ti,composite-mux-clock";
-		clocks = <&sys_ck>, <&core_ck>, <&core_d2_ck>, <&core_d3_ck>, <&core_d4_ck>, <&core_d5_ck>, <&core_d6_ck>, <&core_d8_ck>, <&core_d9_ck>, <&core_d12_ck>, <&core_d16_ck>;
-		ti,bit-shift = <8>;
-		reg = <0x0240>;
-	};
-
-	dss1_fck: dss1_fck {
-		#clock-cells = <0>;
-		compatible = "ti,composite-clock";
-		clocks = <&dss1_gate_fck>, <&dss1_mux_fck>;
-	};
-
-	dss2_gate_fck: dss2_gate_fck@200 {
-		#clock-cells = <0>;
-		compatible = "ti,composite-no-wait-gate-clock";
-		clocks = <&func_48m_ck>;
-		ti,bit-shift = <1>;
-		reg = <0x0200>;
-	};
-
-	dss2_mux_fck: dss2_mux_fck@240 {
-		#clock-cells = <0>;
-		compatible = "ti,composite-mux-clock";
-		clocks = <&sys_ck>, <&func_48m_ck>;
-		ti,bit-shift = <13>;
-		reg = <0x0240>;
-	};
-
-	dss2_fck: dss2_fck {
-		#clock-cells = <0>;
-		compatible = "ti,composite-clock";
-		clocks = <&dss2_gate_fck>, <&dss2_mux_fck>;
-	};
-
-	dss_54m_fck: dss_54m_fck@200 {
-		#clock-cells = <0>;
-		compatible = "ti,wait-gate-clock";
-		clocks = <&func_54m_ck>;
-		ti,bit-shift = <2>;
-		reg = <0x0200>;
-	};
-
-	ssi_ssr_sst_gate_fck: ssi_ssr_sst_gate_fck@204 {
-		#clock-cells = <0>;
-		compatible = "ti,composite-gate-clock";
-		clocks = <&core_ck>;
-		ti,bit-shift = <1>;
-		reg = <0x0204>;
-	};
-
-	ssi_ssr_sst_div_fck: ssi_ssr_sst_div_fck@240 {
-		#clock-cells = <0>;
-		compatible = "ti,composite-divider-clock";
-		clocks = <&core_ck>;
-		ti,bit-shift = <20>;
-		reg = <0x0240>;
-	};
-
-	ssi_ssr_sst_fck: ssi_ssr_sst_fck {
-		#clock-cells = <0>;
-		compatible = "ti,composite-clock";
-		clocks = <&ssi_ssr_sst_gate_fck>, <&ssi_ssr_sst_div_fck>;
-	};
-
-	usb_l4_gate_ick: usb_l4_gate_ick@214 {
-		#clock-cells = <0>;
-		compatible = "ti,composite-interface-clock";
-		clocks = <&core_l3_ck>;
-		ti,bit-shift = <0>;
-		reg = <0x0214>;
-	};
-
-	usb_l4_div_ick: usb_l4_div_ick@240 {
-		#clock-cells = <0>;
-		compatible = "ti,composite-divider-clock";
-		clocks = <&core_l3_ck>;
-		ti,bit-shift = <25>;
-		reg = <0x0240>;
-		ti,dividers = <0>, <1>, <2>, <0>, <4>;
-	};
-
-	usb_l4_ick: usb_l4_ick {
-		#clock-cells = <0>;
-		compatible = "ti,composite-clock";
-		clocks = <&usb_l4_gate_ick>, <&usb_l4_div_ick>;
-	};
-
-	ssi_l4_ick: ssi_l4_ick@214 {
-		#clock-cells = <0>;
-		compatible = "ti,omap3-interface-clock";
-		clocks = <&l4_ck>;
-		ti,bit-shift = <1>;
-		reg = <0x0214>;
-	};
-
-	gpt1_ick: gpt1_ick@410 {
-		#clock-cells = <0>;
-		compatible = "ti,omap3-interface-clock";
-		clocks = <&sys_ck>;
-		ti,bit-shift = <0>;
-		reg = <0x0410>;
-	};
-
-	gpt1_gate_fck: gpt1_gate_fck@400 {
-		#clock-cells = <0>;
-		compatible = "ti,composite-gate-clock";
-		clocks = <&func_32k_ck>;
-		ti,bit-shift = <0>;
-		reg = <0x0400>;
-	};
-
-	gpt1_mux_fck: gpt1_mux_fck@440 {
-		#clock-cells = <0>;
-		compatible = "ti,composite-mux-clock";
-		clocks = <&func_32k_ck>, <&sys_ck>, <&alt_ck>;
-		reg = <0x0440>;
-	};
-
-	gpt1_fck: gpt1_fck {
-		#clock-cells = <0>;
-		compatible = "ti,composite-clock";
-		clocks = <&gpt1_gate_fck>, <&gpt1_mux_fck>;
-	};
-
-	gpt2_ick: gpt2_ick@210 {
-		#clock-cells = <0>;
-		compatible = "ti,omap3-interface-clock";
-		clocks = <&l4_ck>;
-		ti,bit-shift = <4>;
-		reg = <0x0210>;
-	};
-
-	gpt2_gate_fck: gpt2_gate_fck@200 {
-		#clock-cells = <0>;
-		compatible = "ti,composite-gate-clock";
-		clocks = <&func_32k_ck>;
-		ti,bit-shift = <4>;
-		reg = <0x0200>;
-	};
-
-	gpt2_mux_fck: gpt2_mux_fck@244 {
-		#clock-cells = <0>;
-		compatible = "ti,composite-mux-clock";
-		clocks = <&func_32k_ck>, <&sys_ck>, <&alt_ck>;
-		ti,bit-shift = <2>;
-		reg = <0x0244>;
-	};
-
-	gpt2_fck: gpt2_fck {
-		#clock-cells = <0>;
-		compatible = "ti,composite-clock";
-		clocks = <&gpt2_gate_fck>, <&gpt2_mux_fck>;
-	};
-
-	gpt3_ick: gpt3_ick@210 {
-		#clock-cells = <0>;
-		compatible = "ti,omap3-interface-clock";
-		clocks = <&l4_ck>;
-		ti,bit-shift = <5>;
-		reg = <0x0210>;
-	};
-
-	gpt3_gate_fck: gpt3_gate_fck@200 {
-		#clock-cells = <0>;
-		compatible = "ti,composite-gate-clock";
-		clocks = <&func_32k_ck>;
-		ti,bit-shift = <5>;
-		reg = <0x0200>;
-	};
-
-	gpt3_mux_fck: gpt3_mux_fck@244 {
-		#clock-cells = <0>;
-		compatible = "ti,composite-mux-clock";
-		clocks = <&func_32k_ck>, <&sys_ck>, <&alt_ck>;
-		ti,bit-shift = <4>;
-		reg = <0x0244>;
-	};
-
-	gpt3_fck: gpt3_fck {
-		#clock-cells = <0>;
-		compatible = "ti,composite-clock";
-		clocks = <&gpt3_gate_fck>, <&gpt3_mux_fck>;
-	};
-
-	gpt4_ick: gpt4_ick@210 {
-		#clock-cells = <0>;
-		compatible = "ti,omap3-interface-clock";
-		clocks = <&l4_ck>;
-		ti,bit-shift = <6>;
-		reg = <0x0210>;
-	};
-
-	gpt4_gate_fck: gpt4_gate_fck@200 {
-		#clock-cells = <0>;
-		compatible = "ti,composite-gate-clock";
-		clocks = <&func_32k_ck>;
-		ti,bit-shift = <6>;
-		reg = <0x0200>;
-	};
-
-	gpt4_mux_fck: gpt4_mux_fck@244 {
-		#clock-cells = <0>;
-		compatible = "ti,composite-mux-clock";
-		clocks = <&func_32k_ck>, <&sys_ck>, <&alt_ck>;
-		ti,bit-shift = <6>;
-		reg = <0x0244>;
-	};
-
-	gpt4_fck: gpt4_fck {
-		#clock-cells = <0>;
-		compatible = "ti,composite-clock";
-		clocks = <&gpt4_gate_fck>, <&gpt4_mux_fck>;
-	};
-
-	gpt5_ick: gpt5_ick@210 {
-		#clock-cells = <0>;
-		compatible = "ti,omap3-interface-clock";
-		clocks = <&l4_ck>;
-		ti,bit-shift = <7>;
-		reg = <0x0210>;
-	};
-
-	gpt5_gate_fck: gpt5_gate_fck@200 {
-		#clock-cells = <0>;
-		compatible = "ti,composite-gate-clock";
-		clocks = <&func_32k_ck>;
-		ti,bit-shift = <7>;
-		reg = <0x0200>;
-	};
-
-	gpt5_mux_fck: gpt5_mux_fck@244 {
-		#clock-cells = <0>;
-		compatible = "ti,composite-mux-clock";
-		clocks = <&func_32k_ck>, <&sys_ck>, <&alt_ck>;
-		ti,bit-shift = <8>;
-		reg = <0x0244>;
-	};
-
-	gpt5_fck: gpt5_fck {
-		#clock-cells = <0>;
-		compatible = "ti,composite-clock";
-		clocks = <&gpt5_gate_fck>, <&gpt5_mux_fck>;
-	};
-
-	gpt6_ick: gpt6_ick@210 {
-		#clock-cells = <0>;
-		compatible = "ti,omap3-interface-clock";
-		clocks = <&l4_ck>;
-		ti,bit-shift = <8>;
-		reg = <0x0210>;
-	};
-
-	gpt6_gate_fck: gpt6_gate_fck@200 {
-		#clock-cells = <0>;
-		compatible = "ti,composite-gate-clock";
-		clocks = <&func_32k_ck>;
-		ti,bit-shift = <8>;
-		reg = <0x0200>;
-	};
-
-	gpt6_mux_fck: gpt6_mux_fck@244 {
-		#clock-cells = <0>;
-		compatible = "ti,composite-mux-clock";
-		clocks = <&func_32k_ck>, <&sys_ck>, <&alt_ck>;
-		ti,bit-shift = <10>;
-		reg = <0x0244>;
-	};
-
-	gpt6_fck: gpt6_fck {
-		#clock-cells = <0>;
-		compatible = "ti,composite-clock";
-		clocks = <&gpt6_gate_fck>, <&gpt6_mux_fck>;
-	};
-
-	gpt7_ick: gpt7_ick@210 {
-		#clock-cells = <0>;
-		compatible = "ti,omap3-interface-clock";
-		clocks = <&l4_ck>;
-		ti,bit-shift = <9>;
-		reg = <0x0210>;
-	};
-
-	gpt7_gate_fck: gpt7_gate_fck@200 {
-		#clock-cells = <0>;
-		compatible = "ti,composite-gate-clock";
-		clocks = <&func_32k_ck>;
-		ti,bit-shift = <9>;
-		reg = <0x0200>;
-	};
-
-	gpt7_mux_fck: gpt7_mux_fck@244 {
-		#clock-cells = <0>;
-		compatible = "ti,composite-mux-clock";
-		clocks = <&func_32k_ck>, <&sys_ck>, <&alt_ck>;
-		ti,bit-shift = <12>;
-		reg = <0x0244>;
-	};
-
-	gpt7_fck: gpt7_fck {
-		#clock-cells = <0>;
-		compatible = "ti,composite-clock";
-		clocks = <&gpt7_gate_fck>, <&gpt7_mux_fck>;
-	};
-
-	gpt8_ick: gpt8_ick@210 {
-		#clock-cells = <0>;
-		compatible = "ti,omap3-interface-clock";
-		clocks = <&l4_ck>;
-		ti,bit-shift = <10>;
-		reg = <0x0210>;
-	};
-
-	gpt8_gate_fck: gpt8_gate_fck@200 {
-		#clock-cells = <0>;
-		compatible = "ti,composite-gate-clock";
-		clocks = <&func_32k_ck>;
-		ti,bit-shift = <10>;
-		reg = <0x0200>;
-	};
-
-	gpt8_mux_fck: gpt8_mux_fck@244 {
-		#clock-cells = <0>;
-		compatible = "ti,composite-mux-clock";
-		clocks = <&func_32k_ck>, <&sys_ck>, <&alt_ck>;
-		ti,bit-shift = <14>;
-		reg = <0x0244>;
-	};
-
-	gpt8_fck: gpt8_fck {
-		#clock-cells = <0>;
-		compatible = "ti,composite-clock";
-		clocks = <&gpt8_gate_fck>, <&gpt8_mux_fck>;
-	};
-
-	gpt9_ick: gpt9_ick@210 {
-		#clock-cells = <0>;
-		compatible = "ti,omap3-interface-clock";
-		clocks = <&l4_ck>;
-		ti,bit-shift = <11>;
-		reg = <0x0210>;
-	};
-
-	gpt9_gate_fck: gpt9_gate_fck@200 {
-		#clock-cells = <0>;
-		compatible = "ti,composite-gate-clock";
-		clocks = <&func_32k_ck>;
-		ti,bit-shift = <11>;
-		reg = <0x0200>;
-	};
-
-	gpt9_mux_fck: gpt9_mux_fck@244 {
-		#clock-cells = <0>;
-		compatible = "ti,composite-mux-clock";
-		clocks = <&func_32k_ck>, <&sys_ck>, <&alt_ck>;
-		ti,bit-shift = <16>;
-		reg = <0x0244>;
-	};
-
-	gpt9_fck: gpt9_fck {
-		#clock-cells = <0>;
-		compatible = "ti,composite-clock";
-		clocks = <&gpt9_gate_fck>, <&gpt9_mux_fck>;
-	};
-
-	gpt10_ick: gpt10_ick@210 {
-		#clock-cells = <0>;
-		compatible = "ti,omap3-interface-clock";
-		clocks = <&l4_ck>;
-		ti,bit-shift = <12>;
-		reg = <0x0210>;
-	};
-
-	gpt10_gate_fck: gpt10_gate_fck@200 {
-		#clock-cells = <0>;
-		compatible = "ti,composite-gate-clock";
-		clocks = <&func_32k_ck>;
-		ti,bit-shift = <12>;
-		reg = <0x0200>;
-	};
-
-	gpt10_mux_fck: gpt10_mux_fck@244 {
-		#clock-cells = <0>;
-		compatible = "ti,composite-mux-clock";
-		clocks = <&func_32k_ck>, <&sys_ck>, <&alt_ck>;
-		ti,bit-shift = <18>;
-		reg = <0x0244>;
-	};
-
-	gpt10_fck: gpt10_fck {
-		#clock-cells = <0>;
-		compatible = "ti,composite-clock";
-		clocks = <&gpt10_gate_fck>, <&gpt10_mux_fck>;
-	};
-
-	gpt11_ick: gpt11_ick@210 {
-		#clock-cells = <0>;
-		compatible = "ti,omap3-interface-clock";
-		clocks = <&l4_ck>;
-		ti,bit-shift = <13>;
-		reg = <0x0210>;
-	};
-
-	gpt11_gate_fck: gpt11_gate_fck@200 {
-		#clock-cells = <0>;
-		compatible = "ti,composite-gate-clock";
-		clocks = <&func_32k_ck>;
-		ti,bit-shift = <13>;
-		reg = <0x0200>;
-	};
-
-	gpt11_mux_fck: gpt11_mux_fck@244 {
-		#clock-cells = <0>;
-		compatible = "ti,composite-mux-clock";
-		clocks = <&func_32k_ck>, <&sys_ck>, <&alt_ck>;
-		ti,bit-shift = <20>;
-		reg = <0x0244>;
-	};
-
-	gpt11_fck: gpt11_fck {
-		#clock-cells = <0>;
-		compatible = "ti,composite-clock";
-		clocks = <&gpt11_gate_fck>, <&gpt11_mux_fck>;
-	};
-
-	gpt12_ick: gpt12_ick@210 {
-		#clock-cells = <0>;
-		compatible = "ti,omap3-interface-clock";
-		clocks = <&l4_ck>;
-		ti,bit-shift = <14>;
-		reg = <0x0210>;
-	};
-
-	gpt12_gate_fck: gpt12_gate_fck@200 {
-		#clock-cells = <0>;
-		compatible = "ti,composite-gate-clock";
-		clocks = <&func_32k_ck>;
-		ti,bit-shift = <14>;
-		reg = <0x0200>;
-	};
-
-	gpt12_mux_fck: gpt12_mux_fck@244 {
-		#clock-cells = <0>;
-		compatible = "ti,composite-mux-clock";
-		clocks = <&func_32k_ck>, <&sys_ck>, <&alt_ck>;
-		ti,bit-shift = <22>;
-		reg = <0x0244>;
-	};
-
-	gpt12_fck: gpt12_fck {
-		#clock-cells = <0>;
-		compatible = "ti,composite-clock";
-		clocks = <&gpt12_gate_fck>, <&gpt12_mux_fck>;
-	};
-
-	mcbsp1_ick: mcbsp1_ick@210 {
-		#clock-cells = <0>;
-		compatible = "ti,omap3-interface-clock";
-		clocks = <&l4_ck>;
-		ti,bit-shift = <15>;
-		reg = <0x0210>;
-	};
-
-	mcbsp1_gate_fck: mcbsp1_gate_fck@200 {
-		#clock-cells = <0>;
-		compatible = "ti,composite-gate-clock";
-		clocks = <&mcbsp_clks>;
-		ti,bit-shift = <15>;
-		reg = <0x0200>;
-	};
-
-	mcbsp2_ick: mcbsp2_ick@210 {
-		#clock-cells = <0>;
-		compatible = "ti,omap3-interface-clock";
-		clocks = <&l4_ck>;
-		ti,bit-shift = <16>;
-		reg = <0x0210>;
-	};
-
-	mcbsp2_gate_fck: mcbsp2_gate_fck@200 {
-		#clock-cells = <0>;
-		compatible = "ti,composite-gate-clock";
-		clocks = <&mcbsp_clks>;
-		ti,bit-shift = <16>;
-		reg = <0x0200>;
-	};
-
-	mcspi1_ick: mcspi1_ick@210 {
-		#clock-cells = <0>;
-		compatible = "ti,omap3-interface-clock";
-		clocks = <&l4_ck>;
-		ti,bit-shift = <17>;
-		reg = <0x0210>;
-	};
-
-	mcspi1_fck: mcspi1_fck@200 {
-		#clock-cells = <0>;
-		compatible = "ti,wait-gate-clock";
-		clocks = <&func_48m_ck>;
-		ti,bit-shift = <17>;
-		reg = <0x0200>;
-	};
-
-	mcspi2_ick: mcspi2_ick@210 {
-		#clock-cells = <0>;
-		compatible = "ti,omap3-interface-clock";
-		clocks = <&l4_ck>;
-		ti,bit-shift = <18>;
-		reg = <0x0210>;
-	};
-
-	mcspi2_fck: mcspi2_fck@200 {
-		#clock-cells = <0>;
-		compatible = "ti,wait-gate-clock";
-		clocks = <&func_48m_ck>;
-		ti,bit-shift = <18>;
-		reg = <0x0200>;
-	};
-
-	uart1_ick: uart1_ick@210 {
-		#clock-cells = <0>;
-		compatible = "ti,omap3-interface-clock";
-		clocks = <&l4_ck>;
-		ti,bit-shift = <21>;
-		reg = <0x0210>;
-	};
-
-	uart1_fck: uart1_fck@200 {
-		#clock-cells = <0>;
-		compatible = "ti,wait-gate-clock";
-		clocks = <&func_48m_ck>;
-		ti,bit-shift = <21>;
-		reg = <0x0200>;
-	};
-
-	uart2_ick: uart2_ick@210 {
-		#clock-cells = <0>;
-		compatible = "ti,omap3-interface-clock";
-		clocks = <&l4_ck>;
-		ti,bit-shift = <22>;
-		reg = <0x0210>;
-	};
-
-	uart2_fck: uart2_fck@200 {
-		#clock-cells = <0>;
-		compatible = "ti,wait-gate-clock";
-		clocks = <&func_48m_ck>;
-		ti,bit-shift = <22>;
-		reg = <0x0200>;
-	};
-
-	uart3_ick: uart3_ick@214 {
-		#clock-cells = <0>;
-		compatible = "ti,omap3-interface-clock";
-		clocks = <&l4_ck>;
-		ti,bit-shift = <2>;
-		reg = <0x0214>;
-	};
-
-	uart3_fck: uart3_fck@204 {
-		#clock-cells = <0>;
-		compatible = "ti,wait-gate-clock";
-		clocks = <&func_48m_ck>;
-		ti,bit-shift = <2>;
-		reg = <0x0204>;
-	};
-
-	gpios_ick: gpios_ick@410 {
-		#clock-cells = <0>;
-		compatible = "ti,omap3-interface-clock";
-		clocks = <&sys_ck>;
-		ti,bit-shift = <2>;
-		reg = <0x0410>;
-	};
-
-	gpios_fck: gpios_fck@400 {
-		#clock-cells = <0>;
-		compatible = "ti,wait-gate-clock";
-		clocks = <&func_32k_ck>;
-		ti,bit-shift = <2>;
-		reg = <0x0400>;
-	};
-
-	mpu_wdt_ick: mpu_wdt_ick@410 {
-		#clock-cells = <0>;
-		compatible = "ti,omap3-interface-clock";
-		clocks = <&sys_ck>;
-		ti,bit-shift = <3>;
-		reg = <0x0410>;
-	};
-
-	mpu_wdt_fck: mpu_wdt_fck@400 {
-		#clock-cells = <0>;
-		compatible = "ti,wait-gate-clock";
-		clocks = <&func_32k_ck>;
-		ti,bit-shift = <3>;
-		reg = <0x0400>;
-	};
-
-	sync_32k_ick: sync_32k_ick@410 {
-		#clock-cells = <0>;
-		compatible = "ti,omap3-interface-clock";
-		clocks = <&sys_ck>;
-		ti,bit-shift = <1>;
-		reg = <0x0410>;
-	};
-
-	wdt1_ick: wdt1_ick@410 {
-		#clock-cells = <0>;
-		compatible = "ti,omap3-interface-clock";
-		clocks = <&sys_ck>;
-		ti,bit-shift = <4>;
-		reg = <0x0410>;
-	};
-
-	omapctrl_ick: omapctrl_ick@410 {
-		#clock-cells = <0>;
-		compatible = "ti,omap3-interface-clock";
-		clocks = <&sys_ck>;
-		ti,bit-shift = <5>;
-		reg = <0x0410>;
-	};
-
-	cam_fck: cam_fck@200 {
-		#clock-cells = <0>;
-		compatible = "ti,gate-clock";
-		clocks = <&func_96m_ck>;
-		ti,bit-shift = <31>;
-		reg = <0x0200>;
-	};
-
-	cam_ick: cam_ick@210 {
-		#clock-cells = <0>;
-		compatible = "ti,omap3-no-wait-interface-clock";
-		clocks = <&l4_ck>;
-		ti,bit-shift = <31>;
-		reg = <0x0210>;
-	};
-
-	mailboxes_ick: mailboxes_ick@210 {
-		#clock-cells = <0>;
-		compatible = "ti,omap3-interface-clock";
-		clocks = <&l4_ck>;
-		ti,bit-shift = <30>;
-		reg = <0x0210>;
-	};
-
-	wdt4_ick: wdt4_ick@210 {
-		#clock-cells = <0>;
-		compatible = "ti,omap3-interface-clock";
-		clocks = <&l4_ck>;
-		ti,bit-shift = <29>;
-		reg = <0x0210>;
-	};
-
-	wdt4_fck: wdt4_fck@200 {
-		#clock-cells = <0>;
-		compatible = "ti,wait-gate-clock";
-		clocks = <&func_32k_ck>;
-		ti,bit-shift = <29>;
-		reg = <0x0200>;
-	};
-
-	mspro_ick: mspro_ick@210 {
-		#clock-cells = <0>;
-		compatible = "ti,omap3-interface-clock";
-		clocks = <&l4_ck>;
-		ti,bit-shift = <27>;
-		reg = <0x0210>;
-	};
-
-	mspro_fck: mspro_fck@200 {
-		#clock-cells = <0>;
-		compatible = "ti,wait-gate-clock";
-		clocks = <&func_96m_ck>;
-		ti,bit-shift = <27>;
-		reg = <0x0200>;
-	};
-
-	fac_ick: fac_ick@210 {
-		#clock-cells = <0>;
-		compatible = "ti,omap3-interface-clock";
-		clocks = <&l4_ck>;
-		ti,bit-shift = <25>;
-		reg = <0x0210>;
-	};
-
-	fac_fck: fac_fck@200 {
-		#clock-cells = <0>;
-		compatible = "ti,wait-gate-clock";
-		clocks = <&func_12m_ck>;
-		ti,bit-shift = <25>;
-		reg = <0x0200>;
-	};
-
-	hdq_ick: hdq_ick@210 {
-		#clock-cells = <0>;
-		compatible = "ti,omap3-interface-clock";
-		clocks = <&l4_ck>;
-		ti,bit-shift = <23>;
-		reg = <0x0210>;
-	};
-
-	hdq_fck: hdq_fck@200 {
-		#clock-cells = <0>;
-		compatible = "ti,wait-gate-clock";
-		clocks = <&func_12m_ck>;
-		ti,bit-shift = <23>;
-		reg = <0x0200>;
-	};
-
-	i2c1_ick: i2c1_ick@210 {
-		#clock-cells = <0>;
-		compatible = "ti,omap3-interface-clock";
-		clocks = <&l4_ck>;
-		ti,bit-shift = <19>;
-		reg = <0x0210>;
-	};
-
-	i2c2_ick: i2c2_ick@210 {
-		#clock-cells = <0>;
-		compatible = "ti,omap3-interface-clock";
-		clocks = <&l4_ck>;
-		ti,bit-shift = <20>;
-		reg = <0x0210>;
-	};
-
-	gpmc_fck: gpmc_fck@238 {
-		#clock-cells = <0>;
-		compatible = "ti,fixed-factor-clock";
-		clocks = <&core_l3_ck>;
-		ti,clock-div = <1>;
-		ti,autoidle-shift = <1>;
-		reg = <0x0238>;
-		ti,clock-mult = <1>;
-	};
-
-	sdma_fck: sdma_fck {
-		#clock-cells = <0>;
-		compatible = "fixed-factor-clock";
-		clocks = <&core_l3_ck>;
-		clock-mult = <1>;
-		clock-div = <1>;
-	};
-
-	sdma_ick: sdma_ick@238 {
-		#clock-cells = <0>;
-		compatible = "ti,fixed-factor-clock";
-		clocks = <&core_l3_ck>;
-		ti,clock-div = <1>;
-		ti,autoidle-shift = <0>;
-		reg = <0x0238>;
-		ti,clock-mult = <1>;
-	};
-
-	sdrc_ick: sdrc_ick@238 {
-		#clock-cells = <0>;
-		compatible = "ti,fixed-factor-clock";
-		clocks = <&core_l3_ck>;
-		ti,clock-div = <1>;
-		ti,autoidle-shift = <2>;
-		reg = <0x0238>;
-		ti,clock-mult = <1>;
-	};
-
-	des_ick: des_ick@21c {
-		#clock-cells = <0>;
-		compatible = "ti,omap3-interface-clock";
-		clocks = <&l4_ck>;
-		ti,bit-shift = <0>;
-		reg = <0x021c>;
-	};
-
-	sha_ick: sha_ick@21c {
-		#clock-cells = <0>;
-		compatible = "ti,omap3-interface-clock";
-		clocks = <&l4_ck>;
-		ti,bit-shift = <1>;
-		reg = <0x021c>;
-	};
-
-	rng_ick: rng_ick@21c {
-		#clock-cells = <0>;
-		compatible = "ti,omap3-interface-clock";
-		clocks = <&l4_ck>;
-		ti,bit-shift = <2>;
-		reg = <0x021c>;
-	};
-
-	aes_ick: aes_ick@21c {
-		#clock-cells = <0>;
-		compatible = "ti,omap3-interface-clock";
-		clocks = <&l4_ck>;
-		ti,bit-shift = <3>;
-		reg = <0x021c>;
-	};
-
-	pka_ick: pka_ick@21c {
-		#clock-cells = <0>;
-		compatible = "ti,omap3-interface-clock";
-		clocks = <&l4_ck>;
-		ti,bit-shift = <4>;
-		reg = <0x021c>;
-	};
-
-	usb_fck: usb_fck@204 {
-		#clock-cells = <0>;
-		compatible = "ti,wait-gate-clock";
-		clocks = <&func_48m_ck>;
-		ti,bit-shift = <0>;
-		reg = <0x0204>;
-	};
-};

@@ -22,9 +22,7 @@ CONFIG_NAMESPACES=y
 CONFIG_BLK_DEV_INITRD=y
 CONFIG_EXPERT=y
 CONFIG_PROFILING=y
-CONFIG_ARCH_MULTI_V6=y
 CONFIG_OMAP_RESET_CLOCKS=y
-CONFIG_ARCH_OMAP2=y
 CONFIG_ARCH_OMAP3=y
 CONFIG_ARCH_OMAP4=y
 CONFIG_SOC_OMAP5=y

@@ -5,15 +5,6 @@ menu "TI OMAP/AM/DM/DRA Family"
 config OMAP_HWMOD
 	bool
 
-config ARCH_OMAP2
-	bool "TI OMAP2"
-	depends on ARCH_MULTI_V6
-	depends on !SMP
-	select ARCH_OMAP2PLUS
-	select CPU_ARM1136R0
-	select OMAP_HWMOD
-	select SOC_HAS_OMAP2_SDRC
-
 config ARCH_OMAP3
 	bool "TI OMAP3"
 	depends on ARCH_MULTI_V7

@@ -118,7 +109,7 @@ config ARCH_OMAP2PLUS
 	select OMAP_IRQCHIP
 	select CLKSRC_TI_32K
 	help
-	  Systems based on OMAP2, OMAP3, OMAP4 or OMAP5
+	  Systems based on OMAP3, OMAP4 or OMAP5
 
 config OMAP_INTERCONNECT_BARRIER
 	bool

@@ -129,7 +120,7 @@ config ARCH_OMAP
 
 if ARCH_OMAP2PLUS
 
-menu "TI OMAP2/3/4 Specific Features"
+menu "TI OMAP3/4 Specific Features"
 
 config ARCH_OMAP2PLUS_TYPICAL
 	bool "Typical OMAP configuration"

@@ -138,8 +129,7 @@ config ARCH_OMAP2PLUS_TYPICAL
 	select HIGHMEM
 	select I2C
 	select I2C_OMAP
-	select MENELAUS if ARCH_OMAP2
-	select NEON if CPU_V7
+	select NEON
 	select REGULATOR
 	select REGULATOR_FIXED_VOLTAGE
 	select TWL4030_CORE if ARCH_OMAP3 || ARCH_OMAP4

@@ -204,27 +194,7 @@ config OMAP3_L2_AUX_SECURE_SERVICE_SET_ID
 	  PPA routine service ID for setting L2 auxiliary control register.
 
 comment "OMAP Core Type"
-	depends on ARCH_OMAP2
-
-config SOC_OMAP2420
-	bool "OMAP2420 support (DEPRECATED)"
-	depends on ARCH_OMAP2
-	default y
-	select OMAP_DM_SYSTIMER
-	select OMAP_DM_TIMER
-	select SOC_HAS_OMAP2_SDRC
-	help
-	  This SoC is scheduled for removal in early 2027,
-	  since it uses the ARM1136r0 CPU revision.
-
-config SOC_OMAP2430
-	bool "OMAP2430 support (DEPRECATED)"
-	depends on ARCH_OMAP2
-	default y
-	select SOC_HAS_OMAP2_SDRC
-	help
-	  This SoC is scheduled for removal in early 2027,
-	  since it uses the ARM1136r0 CPU revision.
+	depends on ARCH_OMAP3
 
 config SOC_OMAP3430
 	bool "OMAP3430 support"

@@ -237,33 +207,9 @@ config SOC_TI81XX
 	depends on ARCH_OMAP3
 	default y
 
-comment "OMAP Legacy Platform Data Board Type"
-	depends on ARCH_OMAP2PLUS
-
 config MACH_OMAP_GENERIC
 	bool
 
-config MACH_OMAP2_TUSB6010
-	bool
-	depends on ARCH_OMAP2 && SOC_OMAP2420
-	default y if MACH_NOKIA_N8X0
-
-config MACH_NOKIA_N810
-	bool
-
-config MACH_NOKIA_N810_WIMAX
-	bool
-
-config MACH_NOKIA_N8X0
-	bool "Nokia N800/N810 (DEPRECATED)"
-	depends on SOC_OMAP2420
-	default y
-	select MACH_NOKIA_N810
-	select MACH_NOKIA_N810_WIMAX
-	help
-	  This machine is scheduled for removal in early 2027,
-	  since it uses the ARM1136r0 CPU revision.
-
 endmenu
 
 endif

@@ -5,23 +5,17 @@
 
 # Common support
 obj-y := id.o io.o control.o devices.o fb.o pm.o \
-	 common.o dma.o omap-headsmp.o sram.o
+	 common.o dma.o omap-headsmp.o
 
-hwmod-common				= omap_hwmod.o \
+# OMAP3 hwmod specific
+obj-$(CONFIG_ARCH_OMAP3)		+= sram.o omap_hwmod.o \
 					  omap_hwmod_common_data.o \
 					  omap_hwmod_common_ipblock_data.o \
 					  omap_device.o display.o hdq1w.o \
 					  i2c.o wd_timer.o
-clock-common				= clock.o
-secure-common				= omap-smc.o omap-secure.o
 
-obj-$(CONFIG_ARCH_OMAP2) += $(omap-2-3-common) $(hwmod-common)
-obj-$(CONFIG_ARCH_OMAP3) += $(omap-2-3-common) $(hwmod-common) $(secure-common)
-obj-$(CONFIG_ARCH_OMAP4) += $(secure-common)
-obj-$(CONFIG_SOC_AM33XX) += $(secure-common)
-obj-$(CONFIG_SOC_OMAP5)  += $(secure-common)
-obj-$(CONFIG_SOC_AM43XX) += $(secure-common)
-obj-$(CONFIG_SOC_DRA7XX) += $(secure-common)
+# secure world
+obj-y					+= omap-smc.o omap-secure.o
 
 ifneq ($(CONFIG_SND_SOC_OMAP_MCBSP),)
 obj-$(CONFIG_OMAP_HWMOD) += mcbsp.o

@@ -49,13 +43,7 @@ omap5-dra7-common-$(CONFIG_SOC_HAS_REALTIME_COUNTER) =  timer.o
 obj-$(CONFIG_SOC_OMAP5)			+= $(omap5-dra7-common-y)
 obj-$(CONFIG_SOC_DRA7XX)		+= $(omap5-dra7-common-y)
 
-# Functions loaded to SRAM
-obj-$(CONFIG_SOC_OMAP2420)		+= sram242x.o
-obj-$(CONFIG_SOC_OMAP2430)		+= sram243x.o
-
 # Restart code (OMAP4/5 currently in omap4-common.c)
-obj-$(CONFIG_SOC_OMAP2420)		+= omap2-restart.o
-obj-$(CONFIG_SOC_OMAP2430)		+= omap2-restart.o
 obj-$(CONFIG_SOC_TI81XX)		+= ti81xx-restart.o
 obj-$(CONFIG_SOC_AM33XX)		+= am33xx-restart.o
 obj-$(CONFIG_SOC_AM43XX)		+= omap4-restart.o

@@ -65,7 +53,6 @@ obj-$(CONFIG_SOC_OMAP5)			+= omap4-restart.o
 obj-$(CONFIG_SOC_DRA7XX)		+= omap4-restart.o
 
 # SMS/SDRC
-obj-$(CONFIG_ARCH_OMAP2)		+= sdrc2xxx.o
 # obj-$(CONFIG_ARCH_OMAP3)		+= sdrc3xxx.o
 
 # OPP table initialization

@@ -80,7 +67,6 @@ obj-$(CONFIG_ARCH_OMAP4)		+= $(omap-4-5-pm-common)
 obj-$(CONFIG_SOC_OMAP5)			+= $(omap-4-5-pm-common)
 
 ifeq ($(CONFIG_PM),y)
-obj-$(CONFIG_ARCH_OMAP2)		+= sleep24xx.o
 obj-$(CONFIG_ARCH_OMAP3)		+= pm34xx.o sleep34xx.o
 omap-4-5-pm-common			+= pm44xx.o
 obj-$(CONFIG_ARCH_OMAP4)		+= $(omap-4-5-pm-common)

@@ -105,7 +91,6 @@ endif
 
 # PRCM
 obj-y					+= prm_common.o cm_common.o
-obj-$(CONFIG_ARCH_OMAP2)		+= prm2xxx_3xxx.o prm2xxx.o cm2xxx.o
 obj-$(CONFIG_ARCH_OMAP3)		+= prm2xxx_3xxx.o prm3xxx.o cm3xxx.o
 obj-$(CONFIG_ARCH_OMAP3)		+= vc3xxx_data.o vp3xxx_data.o
 omap-prcm-4-5-common			=  cminst44xx.o prm44xx.o \

@@ -122,8 +107,6 @@ obj-$(CONFIG_SOC_AM43XX)		+= $(omap-prcm-4-5-common) \
 
 # OMAP voltage domains
 voltagedomain-common			:= voltage.o vc.o vp.o
-obj-$(CONFIG_ARCH_OMAP2)		+= $(voltagedomain-common)
-obj-$(CONFIG_ARCH_OMAP2)		+= voltagedomains2xxx_data.o
 obj-$(CONFIG_ARCH_OMAP3)		+= $(voltagedomain-common)
 obj-$(CONFIG_ARCH_OMAP3)		+= voltagedomains3xxx_data.o
 obj-$(CONFIG_ARCH_OMAP4)		+= $(voltagedomain-common)

@@ -136,9 +119,6 @@ obj-$(CONFIG_SOC_DRA7XX)		+= $(voltagedomain-common)
 
 # OMAP powerdomain framework
 powerdomain-common			+= powerdomain.o powerdomain-common.o
-obj-$(CONFIG_ARCH_OMAP2)		+= $(powerdomain-common)
-obj-$(CONFIG_ARCH_OMAP2)		+= powerdomains2xxx_data.o
-obj-$(CONFIG_ARCH_OMAP2)		+= powerdomains2xxx_3xxx_data.o
 obj-$(CONFIG_ARCH_OMAP3)		+= $(powerdomain-common)
 obj-$(CONFIG_ARCH_OMAP3)		+= powerdomains3xxx_data.o
 obj-$(CONFIG_ARCH_OMAP3)		+= powerdomains2xxx_3xxx_data.o

@@ -155,10 +135,6 @@ obj-$(CONFIG_SOC_DRA7XX)		+= powerdomains7xx_data.o
 
 # PRCM clockdomain control
 clockdomain-common			+= clockdomain.o
-obj-$(CONFIG_ARCH_OMAP2)		+= $(clockdomain-common)
-obj-$(CONFIG_ARCH_OMAP2)		+= clockdomains2xxx_3xxx_data.o
-obj-$(CONFIG_SOC_OMAP2420)		+= clockdomains2420_data.o
-obj-$(CONFIG_SOC_OMAP2430)		+= clockdomains2430_data.o
 obj-$(CONFIG_ARCH_OMAP3)		+= $(clockdomain-common)
 obj-$(CONFIG_ARCH_OMAP3)		+= clockdomains2xxx_3xxx_data.o
 obj-$(CONFIG_ARCH_OMAP3)		+= clockdomains3xxx_data.o

@@ -176,47 +152,20 @@ obj-$(CONFIG_SOC_DRA7XX)		+= $(clockdomain-common)
 obj-$(CONFIG_SOC_DRA7XX)		+= clockdomains7xx_data.o
 
 # Clock framework
-obj-$(CONFIG_ARCH_OMAP2)		+= $(clock-common)
-obj-$(CONFIG_ARCH_OMAP2)		+= clkt2xxx_dpllcore.o
-obj-$(CONFIG_ARCH_OMAP2)		+= clkt2xxx_virt_prcm_set.o
-obj-$(CONFIG_ARCH_OMAP2)		+= clkt2xxx_dpll.o
-obj-$(CONFIG_ARCH_OMAP3)		+= $(clock-common)
-obj-$(CONFIG_ARCH_OMAP4)		+= $(clock-common)
-obj-$(CONFIG_SOC_AM33XX)		+= $(clock-common)
-obj-$(CONFIG_SOC_OMAP5)			+= $(clock-common)
-obj-$(CONFIG_SOC_DRA7XX)		+= $(clock-common)
-obj-$(CONFIG_SOC_AM43XX)		+= $(clock-common)
-
-# OMAP2 clock rate set data (old "OPP" data)
-obj-$(CONFIG_SOC_OMAP2420)		+= opp2420_data.o
-obj-$(CONFIG_SOC_OMAP2430)		+= opp2430_data.o
+obj-y					+= clock.o
 
 # hwmod data
-obj-$(CONFIG_SOC_OMAP2420)		+= omap_hwmod_2xxx_ipblock_data.o
-obj-$(CONFIG_SOC_OMAP2420)		+= omap_hwmod_2xxx_3xxx_ipblock_data.o
-obj-$(CONFIG_SOC_OMAP2420)		+= omap_hwmod_2xxx_interconnect_data.o
-obj-$(CONFIG_SOC_OMAP2420)		+= omap_hwmod_2420_data.o
-obj-$(CONFIG_SOC_OMAP2430)		+= omap_hwmod_2xxx_ipblock_data.o
-obj-$(CONFIG_SOC_OMAP2430)		+= omap_hwmod_2xxx_3xxx_ipblock_data.o
-obj-$(CONFIG_SOC_OMAP2430)		+= omap_hwmod_2xxx_interconnect_data.o
-obj-$(CONFIG_SOC_OMAP2430)		+= omap_hwmod_2430_data.o
 obj-$(CONFIG_ARCH_OMAP3)		+= omap_hwmod_2xxx_3xxx_ipblock_data.o
 obj-$(CONFIG_ARCH_OMAP3)		+= omap_hwmod_3xxx_data.o
 obj-$(CONFIG_SOC_TI81XX)		+= omap_hwmod_81xx_data.o
 
-# OMAP2420 MSDI controller integration support ("MMC")
-obj-$(CONFIG_SOC_OMAP2420)		+= msdi.o
-
 # Specific board support
 obj-$(CONFIG_MACH_OMAP_GENERIC)		+= board-generic.o pdata-quirks.o
-obj-$(CONFIG_MACH_NOKIA_N8X0)		+= board-n8x0.o
 
 # Platform specific device init code
 
 obj-y					+= omap_phy_internal.o
 
-obj-$(CONFIG_MACH_OMAP2_TUSB6010)	+= usb-tusb6010.o
-
 $(obj)/pm-asm-offsets.h: $(obj)/pm-asm-offsets.s FORCE
 	$(call filechk,offsets,__TI_PM_ASM_OFFSETS_H__)
 

@@ -45,40 +45,6 @@ void tick_broadcast(const struct cpumask *mask)
 }
 #endif
 
-#ifdef CONFIG_SOC_OMAP2420
-static const char *const omap242x_boards_compat[] __initconst = {
-	"ti,omap2420",
-	NULL,
-};
-
-DT_MACHINE_START(OMAP242X_DT, "Generic OMAP2420 (Flattened Device Tree)")
-	.reserve	= omap_reserve,
-	.map_io		= omap242x_map_io,
-	.init_early	= omap2420_init_early,
-	.init_machine	= omap_generic_init,
-	.init_time	= omap_init_time_of,
-	.dt_compat	= omap242x_boards_compat,
-	.restart	= omap2xxx_restart,
-MACHINE_END
-#endif
-
-#ifdef CONFIG_SOC_OMAP2430
-static const char *const omap243x_boards_compat[] __initconst = {
-	"ti,omap2430",
-	NULL,
-};
-
-DT_MACHINE_START(OMAP243X_DT, "Generic OMAP2430 (Flattened Device Tree)")
-	.reserve	= omap_reserve,
-	.map_io		= omap243x_map_io,
-	.init_early	= omap2430_init_early,
-	.init_machine	= omap_generic_init,
-	.init_time	= omap_init_time_of,
-	.dt_compat	= omap243x_boards_compat,
-	.restart	= omap2xxx_restart,
-MACHINE_END
-#endif
-
 #ifdef CONFIG_ARCH_OMAP3
 /* Some boards need board name for legacy userspace in /proc/cpuinfo */
 static const char *const n900_boards_compat[] __initconst = {

@@ -1,512 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * linux/arch/arm/mach-omap2/board-n8x0.c
- *
- * Copyright (C) 2005-2009 Nokia Corporation
- * Author: Juha Yrjola <juha.yrjola@nokia.com>
- *
- * Modified from mach-omap2/board-generic.c
- */
-
-#include <linux/clk.h>
-#include <linux/delay.h>
-#include <linux/gpio/machine.h>
-#include <linux/gpio/consumer.h>
-#include <linux/init.h>
-#include <linux/io.h>
-#include <linux/irq.h>
-#include <linux/stddef.h>
-#include <linux/i2c.h>
-#include <linux/spi/spi.h>
-#include <linux/usb/musb.h>
-#include <linux/mmc/host.h>
-#include <linux/platform_data/mmc-omap.h>
-#include <linux/mfd/menelaus.h>
-
-#include <asm/mach/arch.h>
-#include <asm/mach-types.h>
-
-#include "common.h"
-#include "mmc.h"
-#include "usb-tusb6010.h"
-#include "soc.h"
-#include "common-board-devices.h"
-
-#define TUSB6010_ASYNC_CS	1
-#define TUSB6010_SYNC_CS	4
-#define TUSB6010_DMACHAN	0x3f
-
-#define NOKIA_N810_WIMAX	(1 << 2)
-#define NOKIA_N810		(1 << 1)
-#define NOKIA_N800		(1 << 0)
-
-static u32 board_caps;
-
-#define board_is_n800()		(board_caps & NOKIA_N800)
-#define board_is_n810()		(board_caps & NOKIA_N810)
-#define board_is_n810_wimax()	(board_caps & NOKIA_N810_WIMAX)
-
-static void board_check_revision(void)
-{
-	if (of_machine_is_compatible("nokia,n800"))
-		board_caps = NOKIA_N800;
-	else if (of_machine_is_compatible("nokia,n810"))
-		board_caps = NOKIA_N810;
-	else if (of_machine_is_compatible("nokia,n810-wimax"))
-		board_caps = NOKIA_N810_WIMAX;
-
-	if (!board_caps)
-		pr_err("Unknown board\n");
-}
-
-#if IS_ENABLED(CONFIG_USB_MUSB_TUSB6010)
-
-static struct musb_hdrc_config musb_config = {
-	.multipoint	= 1,
-	.dyn_fifo	= 1,
-	.num_eps	= 16,
-	.ram_bits	= 12,
-};
-
-static struct musb_hdrc_platform_data tusb_data = {
-	.mode		= MUSB_OTG,
-	.min_power	= 25,	/* x2 = 50 mA drawn from VBUS as peripheral */
-	.power		= 100,	/* Max 100 mA VBUS for host mode */
-	.config		= &musb_config,
-};
-
-static struct gpiod_lookup_table tusb_gpio_table = {
-	.dev_id = "musb-tusb",
-	.table = {
-		GPIO_LOOKUP("gpio-0-31", 0, "enable", GPIO_ACTIVE_HIGH),
-		GPIO_LOOKUP("gpio-32-63", 26, "int", GPIO_ACTIVE_HIGH),
-		{ }
-	},
-};
-
-static void __init n8x0_usb_init(void)
-{
-	int ret = 0;
-
-	gpiod_add_lookup_table(&tusb_gpio_table);
-	ret = tusb6010_setup_interface(&tusb_data, TUSB6010_REFCLK_19, 2,
-				       TUSB6010_ASYNC_CS, TUSB6010_SYNC_CS,
-				       TUSB6010_DMACHAN);
-	if (ret != 0)
-		return;
-
-	pr_info("TUSB 6010\n");
-
-	return;
-}
-#else
-
-static void __init n8x0_usb_init(void) {}
-
-#endif /*CONFIG_USB_MUSB_TUSB6010 */
-
-#if defined(CONFIG_MENELAUS) && IS_ENABLED(CONFIG_MMC_OMAP)
-
-/*
- * On both N800 and N810, only the first of the two MMC controllers is in use.
- * The two MMC slots are multiplexed via Menelaus companion chip over I2C.
- * On N800, both slots are powered via Menelaus. On N810, only one of the
- * slots is powered via Menelaus. The N810 EMMC is powered via GPIO.
- *
- * VMMC				slot 1 on both N800 and N810
- * VDCDC3_APE and VMCS2_APE	slot 2 on N800
- * GPIO23 and GPIO9		slot 2 EMMC on N810
- *
- */
-static int slot1_cover_open;
-static int slot2_cover_open;
-static struct device *mmc_device;
-
-static struct gpiod_lookup_table nokia800_mmc_gpio_table = {
-	.dev_id = "mmci-omap.0",
-	.table = {
-		/* Slot switch, GPIO 96 */
-		GPIO_LOOKUP("gpio-96-127", 0, "switch", GPIO_ACTIVE_HIGH),
-		{ }
-	},
-};
-
-static struct gpiod_lookup_table nokia810_mmc_gpio_table = {
-	.dev_id = "mmci-omap.0",
-	.table = {
-		/* Slot switch, GPIO 96 */
-		GPIO_LOOKUP("gpio-96-127", 0, "switch", GPIO_ACTIVE_HIGH),
-		/* Slot index 1, VSD power, GPIO 23 */
-		GPIO_LOOKUP_IDX("gpio-0-31", 23, "vsd", 1, GPIO_ACTIVE_HIGH),
-		/* Slot index 1, VIO power, GPIO 9 */
-		GPIO_LOOKUP_IDX("gpio-0-31", 9, "vio", 1, GPIO_ACTIVE_HIGH),
-		{ }
-	},
-};
-
-static int n8x0_mmc_set_power_menelaus(struct device *dev, int slot,
-					int power_on, int vdd)
-{
-	int mV;
-
-#ifdef CONFIG_MMC_DEBUG
-	dev_dbg(dev, "Set slot %d power: %s (vdd %d)\n", slot + 1,
-		str_on_off(power_on), vdd);
-#endif
-	if (slot == 0) {
-		if (!power_on)
-			return menelaus_set_vmmc(0);
-		switch (1 << vdd) {
-		case MMC_VDD_33_34:
-		case MMC_VDD_32_33:
-		case MMC_VDD_31_32:
-			mV = 3100;
-			break;
-		case MMC_VDD_30_31:
-			mV = 3000;
-			break;
-		case MMC_VDD_28_29:
-			mV = 2800;
-			break;
-		case MMC_VDD_165_195:
-			mV = 1850;
-			break;
-		default:
-			BUG();
-		}
-		return menelaus_set_vmmc(mV);
-	} else {
-		if (!power_on)
-			return menelaus_set_vdcdc(3, 0);
-		switch (1 << vdd) {
-		case MMC_VDD_33_34:
-		case MMC_VDD_32_33:
-			mV = 3300;
-			break;
-		case MMC_VDD_30_31:
-		case MMC_VDD_29_30:
-			mV = 3000;
-			break;
-		case MMC_VDD_28_29:
-		case MMC_VDD_27_28:
-			mV = 2800;
-			break;
-		case MMC_VDD_24_25:
-		case MMC_VDD_23_24:
-			mV = 2400;
-			break;
-		case MMC_VDD_22_23:
-		case MMC_VDD_21_22:
-			mV = 2200;
-			break;
-		case MMC_VDD_20_21:
-			mV = 2000;
-			break;
-		case MMC_VDD_165_195:
-			mV = 1800;
-			break;
-		default:
-			BUG();
-		}
-		return menelaus_set_vdcdc(3, mV);
-	}
-	return 0;
-}
-
-static int n8x0_mmc_set_power(struct device *dev, int slot, int power_on,
-			      int vdd)
-{
-	if (board_is_n800() || slot == 0)
-		return n8x0_mmc_set_power_menelaus(dev, slot, power_on, vdd);
-
-	/* The n810 power will be handled by GPIO code in the driver */
-
-	return 0;
-}
-
-static int n8x0_mmc_set_bus_mode(struct device *dev, int slot, int bus_mode)
-{
-	int r;
-
-	dev_dbg(dev, "Set slot %d bus mode %s\n", slot + 1,
-		bus_mode == MMC_BUSMODE_OPENDRAIN ? "open-drain" : "push-pull");
-	BUG_ON(slot != 0 && slot != 1);
-	slot++;
-	switch (bus_mode) {
-	case MMC_BUSMODE_OPENDRAIN:
-		r = menelaus_set_mmc_opendrain(slot, 1);
-		break;
-	case MMC_BUSMODE_PUSHPULL:
-		r = menelaus_set_mmc_opendrain(slot, 0);
-		break;
-	default:
-		BUG();
-	}
-	if (r != 0 && printk_ratelimit())
-		dev_err(dev, "MMC: unable to set bus mode for slot %d\n",
-			slot);
-	return r;
-}
-
-static int n8x0_mmc_get_cover_state(struct device *dev, int slot)
-{
-	slot++;
-	BUG_ON(slot != 1 && slot != 2);
-	if (slot == 1)
-		return slot1_cover_open;
-	else
-		return slot2_cover_open;
-}
-
-static void n8x0_mmc_callback(void *data, u8 card_mask)
-{
-#ifdef CONFIG_MMC_OMAP
-	int bit, *openp, index;
-
-	if (board_is_n800()) {
-		bit = 1 << 1;
-		openp = &slot2_cover_open;
-		index = 1;
-	} else {
-		bit = 1;
-		openp = &slot1_cover_open;
-		index = 0;
-	}
-
-	if (card_mask & bit)
-		*openp = 1;
-	else
-		*openp = 0;
-
-	omap_mmc_notify_cover_event(mmc_device, index, *openp);
-#else
-	pr_warn("MMC: notify cover event not available\n");
-#endif
-}
-
-static int n8x0_mmc_late_init(struct device *dev)
-{
-	int r, bit, *openp;
-	int vs2sel;
-
-	mmc_device = dev;
-
-	r = menelaus_set_slot_sel(1);
-	if (r < 0)
-		return r;
-
-	if (board_is_n800())
-		vs2sel = 0;
-	else
-		vs2sel = 2;
-
-	r = menelaus_set_mmc_slot(2, 0, vs2sel, 1);
-	if (r < 0)
-		return r;
-
-	n8x0_mmc_set_power(dev, 0, MMC_POWER_ON, 16); /* MMC_VDD_28_29 */
-	n8x0_mmc_set_power(dev, 1, MMC_POWER_ON, 16);
-
-	r = menelaus_set_mmc_slot(1, 1, 0, 1);
-	if (r < 0)
-		return r;
-	r = menelaus_set_mmc_slot(2, 1, vs2sel, 1);
-	if (r < 0)
-		return r;
-
-	r = menelaus_get_slot_pin_states();
-	if (r < 0)
-		return r;
-
-	if (board_is_n800()) {
-		bit = 1 << 1;
-		openp = &slot2_cover_open;
-	} else {
-		bit = 1;
-		openp = &slot1_cover_open;
-		slot2_cover_open = 0;
-	}
-
-	/* All slot pin bits seem to be inversed until first switch change */
-	if (r == 0xf || r == (0xf & ~bit))
-		r = ~r;
-
-	if (r & bit)
-		*openp = 1;
-	else
-		*openp = 0;
-
-	r = menelaus_register_mmc_callback(n8x0_mmc_callback, NULL);
-
-	return r;
-}
-
-static void n8x0_mmc_shutdown(struct device *dev)
-{
-	int vs2sel;
-
-	if (board_is_n800())
-		vs2sel = 0;
-	else
-		vs2sel = 2;
-
-	menelaus_set_mmc_slot(1, 0, 0, 0);
-	menelaus_set_mmc_slot(2, 0, vs2sel, 0);
-}
-
-static void n8x0_mmc_cleanup(struct device *dev)
-{
-	menelaus_unregister_mmc_callback();
-}
-
-/*
- * MMC controller1 has two slots that are multiplexed via I2C.
- * MMC controller2 is not in use.
- */
-static struct omap_mmc_platform_data mmc1_data = {
-	.nr_slots			= 0,
-	.init				= n8x0_mmc_late_init,
-	.cleanup			= n8x0_mmc_cleanup,
-	.shutdown			= n8x0_mmc_shutdown,
-	.max_freq			= 24000000,
-	.slots[0] = {
-		.wires			= 4,
-		.set_power		= n8x0_mmc_set_power,
-		.set_bus_mode		= n8x0_mmc_set_bus_mode,
-		.get_cover_state	= n8x0_mmc_get_cover_state,
-		.ocr_mask		= MMC_VDD_165_195 | MMC_VDD_30_31 |
-						MMC_VDD_32_33   | MMC_VDD_33_34,
-		.name			= "internal",
-	},
-	.slots[1] = {
-		.set_power		= n8x0_mmc_set_power,
-		.set_bus_mode		= n8x0_mmc_set_bus_mode,
-		.get_cover_state	= n8x0_mmc_get_cover_state,
-		.ocr_mask		= MMC_VDD_165_195 | MMC_VDD_20_21 |
-						MMC_VDD_21_22 | MMC_VDD_22_23 |
-						MMC_VDD_23_24 | MMC_VDD_24_25 |
-						MMC_VDD_27_28 | MMC_VDD_28_29 |
-						MMC_VDD_29_30 | MMC_VDD_30_31 |
-						MMC_VDD_32_33 | MMC_VDD_33_34,
-		.name			= "external",
-	},
-};
-
-static struct omap_mmc_platform_data *mmc_data[OMAP24XX_NR_MMC];
-
-static void __init n8x0_mmc_init(void)
-{
-	if (board_is_n810()) {
-		mmc1_data.slots[0].name = "external";
-
-		/*
-		 * Some Samsung Movinand chips do not like open-ended
-		 * multi-block reads and fall to braind-dead state
-		 * while doing so. Reducing the number of blocks in
-		 * the transfer or delays in clock disable do not help
-		 */
-		mmc1_data.slots[1].name = "internal";
-		mmc1_data.slots[1].ban_openended = 1;
-		gpiod_add_lookup_table(&nokia810_mmc_gpio_table);
-	} else {
-		gpiod_add_lookup_table(&nokia800_mmc_gpio_table);
-	}
-
-	mmc1_data.nr_slots = 2;
-	mmc_data[0] = &mmc1_data;
-}
-#else
-static struct omap_mmc_platform_data mmc1_data;
-static void __init n8x0_mmc_init(void)
-{
-}
-#endif	/* CONFIG_MMC_OMAP */
-
-#ifdef CONFIG_MENELAUS
-
-static int n8x0_auto_sleep_regulators(void)
-{
-	u32 val;
-	int ret;
-
-	val = EN_VPLL_SLEEP | EN_VMMC_SLEEP    \
-		| EN_VAUX_SLEEP | EN_VIO_SLEEP \
-		| EN_VMEM_SLEEP | EN_DC3_SLEEP \
-		| EN_VC_SLEEP | EN_DC2_SLEEP;
-
-	ret = menelaus_set_regulator_sleep(1, val);
-	if (ret < 0) {
-		pr_err("Could not set regulators to sleep on menelaus: %u\n",
-		       ret);
-		return ret;
-	}
-	return 0;
-}
-
-static int n8x0_auto_voltage_scale(void)
-{
-	int ret;
-
-	ret = menelaus_set_vcore_hw(1400, 1050);
-	if (ret < 0) {
-		pr_err("Could not set VCORE voltage on menelaus: %u\n", ret);
-		return ret;
-	}
-	return 0;
-}
-
-static int n8x0_menelaus_late_init(struct device *dev)
-{
-	int ret;
-
-	ret = n8x0_auto_voltage_scale();
-	if (ret < 0)
-		return ret;
-	ret = n8x0_auto_sleep_regulators();
-	if (ret < 0)
-		return ret;
-	return 0;
-}
-
-#else
-static int n8x0_menelaus_late_init(struct device *dev)
-{
-	return 0;
-}
-#endif
-
-struct menelaus_platform_data n8x0_menelaus_platform_data = {
-	.late_init = n8x0_menelaus_late_init,
-};
-
-static struct gpiod_lookup_table nokia810_asoc_gpio_table = {
-	.dev_id = "soc-audio",
-	.table = {
-		GPIO_LOOKUP("gpio-0-15", 10, "headset", GPIO_ACTIVE_HIGH),
-		GPIO_LOOKUP("gpio-80-111", 21, "speaker", GPIO_ACTIVE_HIGH),
-		{ }
-	},
-};
-
-static int __init n8x0_late_initcall(void)
-{
-	if (!board_caps)
-		return -ENODEV;
-
-	n8x0_mmc_init();
-	n8x0_usb_init();
-	gpiod_add_lookup_table(&nokia810_asoc_gpio_table);
-
-	return 0;
-}
-omap_late_initcall(n8x0_late_initcall);
-
-/*
- * Legacy init pdata init for n8x0. Note that we want to follow the
- * I2C bus numbering starting at 0 for device tree like other omaps.
- */
-void * __init n8x0_legacy_init(void)
-{
-	board_check_revision();
-	return &mmc1_data;
-}