Just below the removed lines par->clk_wr_offset is hard coded to 3 so
there is no use in determining a different clock just to then ignore it
anyway. This also removes the only I/O port use remaining in the driver
allowing it to be built without CONFIG_HAS_IOPORT.
Link: https://lore.kernel.org/all/ZBx5aLo5h546BzBt@intel.com/
Suggested-by: Ville Syrjälä <redacted>
Signed-off-by: Niklas Schnelle <schnelle@linux.ibm.com>
---
Note: The HAS_IOPORT Kconfig option was added in v6.4-rc1 so
per-subsystem patches may be applied independently
drivers/video/fbdev/aty/atyfb_base.c | 5 -----
1 file changed, 5 deletions(-)
@@ -3498,11 +3498,6 @@ static int atyfb_setup_generic(struct pci_dev *pdev, struct fb_info *info,if(ret)gotoatyfb_setup_generic_fail;#endif-if(!(aty_ld_le32(CRTC_GEN_CNTL,par)&CRTC_EXT_DISP_EN))-par->clk_wr_offset=(inb(R_GENMO)&0x0CU)>>2;-else-par->clk_wr_offset=aty_ld_8(CLOCK_CNTL,par)&0x03U;-/* according to ATI, we should use clock 3 for acelerated mode */par->clk_wr_offset=3;
From: Ville Syrjälä <hidden> Date: 2023-05-16 12:25:03
On Tue, May 16, 2023 at 01:00:33PM +0200, Niklas Schnelle wrote:
Just below the removed lines par->clk_wr_offset is hard coded to 3 so
there is no use in determining a different clock just to then ignore it
anyway. This also removes the only I/O port use remaining in the driver
allowing it to be built without CONFIG_HAS_IOPORT.
Link: https://lore.kernel.org/all/ZBx5aLo5h546BzBt@intel.com/
Suggested-by: Ville Syrjälä <redacted>
Signed-off-by: Niklas Schnelle <schnelle@linux.ibm.com>
Reviewed-by: Ville Syrjälä <redacted>
quoted hunk
---
Note: The HAS_IOPORT Kconfig option was added in v6.4-rc1 so
per-subsystem patches may be applied independently
drivers/video/fbdev/aty/atyfb_base.c | 5 -----
1 file changed, 5 deletions(-)
@@ -3498,11 +3498,6 @@ static int atyfb_setup_generic(struct pci_dev *pdev, struct fb_info *info,if(ret)gotoatyfb_setup_generic_fail;#endif-if(!(aty_ld_le32(CRTC_GEN_CNTL,par)&CRTC_EXT_DISP_EN))-par->clk_wr_offset=(inb(R_GENMO)&0x0CU)>>2;-else-par->clk_wr_offset=aty_ld_8(CLOCK_CNTL,par)&0x03U;-/* according to ATI, we should use clock 3 for acelerated mode */par->clk_wr_offset=3;
On Tue, May 16, 2023 at 01:00:33PM +0200, Niklas Schnelle wrote:
quoted
Just below the removed lines par->clk_wr_offset is hard coded to 3 so
there is no use in determining a different clock just to then ignore it
anyway. This also removes the only I/O port use remaining in the driver
allowing it to be built without CONFIG_HAS_IOPORT.
Link: https://lore.kernel.org/all/ZBx5aLo5h546BzBt@intel.com/
Suggested-by: Ville Syrjälä <redacted>
Signed-off-by: Niklas Schnelle <schnelle@linux.ibm.com>
Reviewed-by: Ville Syrjälä <redacted>
quoted
---
Note: The HAS_IOPORT Kconfig option was added in v6.4-rc1 so
per-subsystem patches may be applied independently
applied this patch to fbdev git tree.
Thanks!
Helge
@@ -3498,11 +3498,6 @@ static int atyfb_setup_generic(struct pci_dev *pdev, struct fb_info *info,if(ret)gotoatyfb_setup_generic_fail;#endif-if(!(aty_ld_le32(CRTC_GEN_CNTL,par)&CRTC_EXT_DISP_EN))-par->clk_wr_offset=(inb(R_GENMO)&0x0CU)>>2;-else-par->clk_wr_offset=aty_ld_8(CLOCK_CNTL,par)&0x03U;-/* according to ATI, we should use clock 3 for acelerated mode */par->clk_wr_offset=3;--