[PATCH v2 06/49] staging: sm750fb: Update displayControlAdjust_SM750LE to snake case
flat view
STALE1985d
From: Pavle Rohalj <hidden>
Date: 2021-04-07 06:36:31
Also in:
linux-staging, lkml
Subsystem:
staging - silicon motion sm750 frame buffer driver, staging subsystem, the rest · Maintainers:
Sudip Mukherjee, Teddy Wang, Sudip Mukherjee, Greg Kroah-Hartman, Linus Torvalds
Fix "Avoid CamelCase" checkpatch.pl checks for the function displayControlAdjust_SM750LE, including its name, parameters, and body. Signed-off-by: Pavle Rohalj <redacted> --- drivers/staging/sm750fb/ddk750_mode.c | 40 +++++++++++++-------------- 1 file changed, 20 insertions(+), 20 deletions(-)
diff --git a/drivers/staging/sm750fb/ddk750_mode.c b/drivers/staging/sm750fb/ddk750_mode.c
index e00a6cb31947..2fae81b47f46 100644
--- a/drivers/staging/sm750fb/ddk750_mode.c
+++ b/drivers/staging/sm750fb/ddk750_mode.c@@ -14,13 +14,13 @@ * in bit 29:27 of Display Control register. */ static unsigned long -displayControlAdjust_SM750LE(struct mode_parameter *pModeParam, - unsigned long dispControl) +display_control_adjust_sm750le(struct mode_parameter *mode_param, + unsigned long disp_control) { unsigned long x, y; - x = pModeParam->horizontal_display_end; - y = pModeParam->vertical_display_end; + x = mode_param->horizontal_display_end; + y = mode_param->vertical_display_end; /* * SM750LE has to set up the top-left and bottom-right
@@ -36,42 +36,42 @@ displayControlAdjust_SM750LE(struct mode_parameter *pModeParam, ((x - 1) & CRT_AUTO_CENTERING_BR_RIGHT_MASK)); /* - * Assume common fields in dispControl have been properly set before + * Assume common fields in disp_control have been properly set before * calling this function. - * This function only sets the extra fields in dispControl. + * This function only sets the extra fields in disp_control. */ /* Clear bit 29:27 of display control register */ - dispControl &= ~CRT_DISPLAY_CTRL_CLK_MASK; + disp_control &= ~CRT_DISPLAY_CTRL_CLK_MASK; /* Set bit 29:27 of display control register for the right clock */ /* Note that SM750LE only need to supported 7 resolutions. */ if (x == 800 && y == 600) - dispControl |= CRT_DISPLAY_CTRL_CLK_PLL41; + disp_control |= CRT_DISPLAY_CTRL_CLK_PLL41; else if (x == 1024 && y == 768) - dispControl |= CRT_DISPLAY_CTRL_CLK_PLL65; + disp_control |= CRT_DISPLAY_CTRL_CLK_PLL65; else if (x == 1152 && y == 864) - dispControl |= CRT_DISPLAY_CTRL_CLK_PLL80; + disp_control |= CRT_DISPLAY_CTRL_CLK_PLL80; else if (x == 1280 && y == 768) - dispControl |= CRT_DISPLAY_CTRL_CLK_PLL80; + disp_control |= CRT_DISPLAY_CTRL_CLK_PLL80; else if (x == 1280 && y == 720) - dispControl |= CRT_DISPLAY_CTRL_CLK_PLL74; + disp_control |= CRT_DISPLAY_CTRL_CLK_PLL74; else if (x == 1280 && y == 960) - dispControl |= CRT_DISPLAY_CTRL_CLK_PLL108; + disp_control |= CRT_DISPLAY_CTRL_CLK_PLL108; else if (x == 1280 && y == 1024) - dispControl |= CRT_DISPLAY_CTRL_CLK_PLL108; + disp_control |= CRT_DISPLAY_CTRL_CLK_PLL108; else /* default to VGA clock */ - dispControl |= CRT_DISPLAY_CTRL_CLK_PLL25; + disp_control |= CRT_DISPLAY_CTRL_CLK_PLL25; /* Set bit 25:24 of display controller */ - dispControl |= (CRT_DISPLAY_CTRL_CRTSELECT | CRT_DISPLAY_CTRL_RGBBIT); + disp_control |= (CRT_DISPLAY_CTRL_CRTSELECT | CRT_DISPLAY_CTRL_RGBBIT); /* Set bit 14 of display controller */ - dispControl |= DISPLAY_CTRL_CLOCK_PHASE; + disp_control |= DISPLAY_CTRL_CLOCK_PHASE; - poke32(CRT_DISPLAY_CTRL, dispControl); + poke32(CRT_DISPLAY_CTRL, disp_control); - return dispControl; + return disp_control; } /* only timing related registers will be programed */
@@ -125,7 +125,7 @@ static int programModeRegisters(struct mode_parameter *pModeParam, tmp |= DISPLAY_CTRL_HSYNC_PHASE; if (sm750_get_chip_type() == SM750LE) { - displayControlAdjust_SM750LE(pModeParam, tmp); + display_control_adjust_sm750le(pModeParam, tmp); } else { reg = peek32(CRT_DISPLAY_CTRL) & ~(DISPLAY_CTRL_VSYNC_PHASE |
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2.30.2