[PATCH v4 06/14] MIPS: jz4740: DTS: Add nodes for ingenic pinctrl and gpio drivers
From: Paul Cercueil <paul@crapouillou.net>
Date: 2017-04-02 20:45:39
Also in:
linux-devicetree, linux-gpio, linux-mips, linux-mmc, linux-pwm, lkml
Subsystem:
ingenic jz47xx socs, mips, the rest · Maintainers:
Paul Cercueil, Thomas Bogendoerfer, Linus Torvalds
For a description of the pinctrl devicetree node, please read Documentation/devicetree/bindings/pinctrl/ingenic,pinctrl.txt For a description of the gpio devicetree nodes, please read Documentation/devicetree/bindings/gpio/ingenic,gpio.txt Signed-off-by: Paul Cercueil <paul@crapouillou.net> --- arch/mips/boot/dts/ingenic/jz4740.dtsi | 61 ++++++++++++++++++++++++++++++++++ 1 file changed, 61 insertions(+) v2: Changed the devicetree bindings to match the new driver v3: No changes v4: Update the bindings for the v4 version of the drivers
diff --git a/arch/mips/boot/dts/ingenic/jz4740.dtsi b/arch/mips/boot/dts/ingenic/jz4740.dtsi
index 3e1587f1f77a..9c23c877fc34 100644
--- a/arch/mips/boot/dts/ingenic/jz4740.dtsi
+++ b/arch/mips/boot/dts/ingenic/jz4740.dtsi@@ -55,6 +55,67 @@ clock-names = "rtc"; }; + pinctrl: ingenic-pinctrl@10010000 { + compatible = "ingenic,jz4740-pinctrl"; + reg = <0x10010000 0x400>; + + gpa: gpio-controller@0 { + compatible = "ingenic,gpio-bank-a", "ingenic,jz4740-gpio"; + + gpio-controller; + gpio-ranges = <&pinctrl 0 0 32>; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + + interrupt-parent = <&intc>; + interrupts = <28>; + }; + + gpb: gpio-controller@1 { + compatible = "ingenic,gpio-bank-b", "ingenic,jz4740-gpio"; + + gpio-controller; + gpio-ranges = <&pinctrl 0 32 32>; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + + interrupt-parent = <&intc>; + interrupts = <27>; + }; + + gpc: gpio-controller@2 { + compatible = "ingenic,gpio-bank-c", "ingenic,jz4740-gpio"; + + gpio-controller; + gpio-ranges = <&pinctrl 0 64 32>; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + + interrupt-parent = <&intc>; + interrupts = <26>; + }; + + gpd: gpio-controller@3 { + compatible = "ingenic,gpio-bank-d", "ingenic,jz4740-gpio"; + + gpio-controller; + gpio-ranges = <&pinctrl 0 96 32>; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + + interrupt-parent = <&intc>; + interrupts = <25>; + }; + }; + uart0: serial@10030000 { compatible = "ingenic,jz4740-uart"; reg = <0x10030000 0x100>;
--
2.11.0