Re: [PATCH] OMAPDSS: DISPC: Update Accumulator configuration for chroma plane
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From: Tomi Valkeinen <hidden>
Date: 2012-05-15 12:51:32
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linux-omap
On Tue, 2012-05-15 at 13:34 +0530, Chandrabhanu Mahapatra wrote:
DISPC has two accumulator registers DISPC_VIDp_ACCU_0 and DISPC_VIDp_ACCU_1 each with horizontal and vertical bit fields. The bit fields can take values in the range of -1024 to 1023. Based on bit field values DISPC decides on which one out of 8 phases the filtering starts. DISPC_VIDp_ACCU_0 is used for progressive output and for interlaced output both DISPC_VIDp_ACCU_0 and DISPC_VIDp_ACCU_1 are used. The current accumulator values in DISPC scaling logic for chroma plane takes default values for all color modes and rotation types. So, the horizontal and vertical up and downsampling accumulator bit field values have been updated for better performance. Signed-off-by: Chandrabhanu Mahapatra <redacted>
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---@@ -1249,6 +1335,9 @@ static void dispc_ovl_set_scaling_uv(enum omap_plane plane, int scale_x = out_width != orig_width; int scale_y = out_height != orig_height; + dispc_ovl_set_accu_uv(plane, orig_width, orig_height, out_width, + out_height, ilace, color_mode, rotation); + if (!dss_has_feature(FEAT_HANDLE_UV_SEPARATE)) return; if ((color_mode != OMAP_DSS_COLOR_YUV2 &&
This crashes if color mode is not yuv or nv.
Should the set_accu_uv call be a bit later, after these lines:
if (!dss_has_feature(FEAT_HANDLE_UV_SEPARATE))
return;
if ((color_mode != OMAP_DSS_COLOR_YUV2 &&
color_mode != OMAP_DSS_COLOR_UYVY &&
color_mode != OMAP_DSS_COLOR_NV12)) {
/* reset chroma resampling for RGB formats */
REG_FLD_MOD(DISPC_OVL_ATTRIBUTES2(plane), 0, 8, 8);
return;
}
Tomi
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